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PDF 28F200BX Data sheet ( Hoja de datos )

Número de pieza 28F200BX
Descripción 2-MBIT (128K x 16 / 256K x 8) BOOT BLOCK FLASH MEMORY FAMILY
Fabricantes Intel 
Logotipo Intel Logotipo



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2-MBIT (128K x 16 256K x 8)
BOOT BLOCK
FLASH MEMORY FAMILY
28F200BX-T B 28F002BX-T B
Y x8 x16 Input Output Architecture
28F200BX-T 28F200BX-B
For High Performance and High
Integration 16-bit and 32-bit CPUs
Y x8-only Input Output Architecture
28F002BX-T 28F002BX-B
For Space Constrained 8-bit
Applications
Y Upgradeable to Intel’s SmartVoltage
Products
Y Optimized High-Density Blocked
Architecture
One 16-KB Protected Boot Block
Two 8-KB Parameter Blocks
One 96-KB Main Block
One 128 KB Main Block
Top or Bottom Boot Locations
Y Extended Cycling Capability
100 000 Block Erase Cycles
Y Automated Word Byte Write and
Block Erase
Command User Interface
Status Registers
Erase Suspend Capability
Y SRAM-Compatible Write Interface
Y Automatic Power Savings Feature
1 mA Typical ICC Active Current in
Static Operation
Y Hardware Data Protection Feature
Erase Write Lockout during Power
Transitions
Y Very High-Performance Read
60 80 120 ns Maximum Access Time
30 40 40 ns Maximum Output Enable
Time
Y Low Power Consumption
20 mA Typical Active Read Current
Y Reset Deep Power-Down Input
0 2 mA ICC Typical
Acts as Reset for Boot Operations
Y Extended Temperature Operation
b40 C to a85 C
Y Write Protection for Boot Block
Y Industry Standard Surface Mount
Packaging
28F200BX JEDEC ROM Compatible
44-Lead PSOP
56-Lead TSOP
28F002BX 40-Lead TSOP
Y 12V Word Byte Write and Block Erase
VPP e 12V g5% Standard
VPP e 12V g10% Option
Y ETOXTM III Flash Technology
5V Read
Y Independent Software Vendor Support
Other brands and names are the property of their respective owners
Information in this document is provided in connection with Intel products Intel assumes no liability whatsoever including infringement of any patent or
copyright for sale and use of Intel products except as provided in Intel’s Terms and Conditions of Sale for such products Intel retains the right to make
changes to these specifications at any time without notice Microcomputer Products may have minor variations to this specification known as errata
COPYRIGHT INTEL CORPORATION 1995
November 1995
Order Number 290448-005

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28F200BX pdf
28F200BX-T B 28F002BX-T B
The 2-Mbit flash products also provide excellent de-
sign solutions for Digital Cellular Phone and Tele-
communication switching applications requiring high
performance high density storage capability cou-
pled with modular software designs and a small
form factor package (x8-only bus) The 2-Mbit’s
blocking scheme allows for an easy segmentation of
the embedded code with 16 Kbytes of Hardware-
Protected Boot code 2 Main Blocks of program
code and 2 Parameter Blocks of 8 Kbytes each for
frequently updatable data storage and diagnostic
messages (e g phone numbers authorization
codes) Figure 2 is an example of such an applica-
tion with the 28F002BX-T
These are a few actual examples of the wide range
of applications for the 2-Mbit Boot Block flash mem-
ory family which enable system designers to achieve
the best possible product design Only your imagina-
tion limits the applicability of such a versatile product
family
290448 – 4
Figure 1 28F200BX Interface to Intel386TM EX Embedded Processor
290448 – 24
Figure 2 28F002BX Interface to INTEL 80C188EB 8-Bit Embedded Microprocessor
5

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28F200BX arduino
28F200BX-T B 28F002BX-T B
2 1 28F200BX Memory Organization
2 1 1 BLOCKING
The 28F200BX uses a blocked array architecture to
provide independent erasure of memory blocks A
block is erased independently of other blocks in the
array when an address is given within the block ad-
dress range and the Erase Setup and Erase Confirm
commands are written to the CUI The 28F200BX is
a random read write memory only erasure is per-
formed by block
2 1 1 1 Boot Block Operation and Data
Protection
The 16-Kbyte boot block provides a lock feature for
secure code storage The intent of the boot block is
to provide a secure storage area for the kernel code
that is required to boot a system in the event of pow-
er failure or other disruption during code update
This lock feature ensures absolute data integrity by
preventing the boot block from being written or
erased when RP is not at 12V The boot block can
be erased and written when RP is held at 12V for
the duration of the erase or program operation This
allows customers to change the boot code when
necessary while providing security when needed
See the Block Memory Map section for address
locations of the boot block for the 28F200BX-T
and 28F200BX-B
2 1 1 2 Parameter Block Operation
The 28F200BX has 2 parameter blocks (8 Kbytes
each) The parameter blocks are intended to provide
storage for frequently updated system parameters
and configuration or diagnostic information The pa-
rameter blocks can also be used to store additional
boot or main code The parameter blocks however
do not have the hardware write protection feature
that the boot block has The parameter blocks pro-
vide for more efficient memory utilization when deal-
ing with parameter changes versus regularly blocked
devices See the Block Memory Map section for ad-
dress locations of the parameter blocks for the
28F200BX-T and 28F200BX-B
2 1 1 3 Main Block Operation
Two main blocks of memory exist on the 28F200BX
(1 x 128 Kbyte block and 1 x 96-Kbyte block) See
the following section on Block Memory Map for the
address location of these blocks for the 28F200BX-T
and 28F200BX-B products
2 1 2 BLOCK MEMORY MAP
Two versions of the 28F200BX product exist to sup-
port two different memory maps of the array blocks
in order to accommodate different microprocessor
protocols for boot code location The 28F200BX-T
memory map is inverted from the 28F200BX-B
memory map
2 1 2 1 28F200BX-B Memory Map
The 28F200BX-B device has the 16-Kbyte boot
block located from 00000H to 01FFFH to accommo-
date those microprocessors that boot from the bot-
tom of the address map at 00000H In the
28F200BX-B the first 8-Kbyte parameter block re-
sides in memory space from 02000H to 02FFFH
The second 8-Kbyte parameter block resides in
memory space from 03000H to 03FFFH The
96-Kbyte main block resides in memory space from
04000H to 0FFFFH The 128-Kbyte main block re-
sides in memory space from 10000H to 1FFFFH
(word locations) See Figure 7
(Word Addresses)
1FFFFH
128-Kbyte MAIN BLOCK
10000H
0FFFFH
04000H
03FFFH
03000H
02FFFH
02000H
01FFFH
00000H
96-Kbyte MAIN BLOCK
8-Kbyte PARAMETER BLOCK
8-Kbyte PARAMETER BLOCK
16-Kbyte BOOT BLOCK
Figure 7 28F200BX-B Memory Map
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