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PDF SDUD40N03L Data sheet ( Hoja de datos )
| Número de pieza | SDUD40N03L | |
| Descripción | N-Channle Logic Level Enhancement Mode Field Effect Transistor | |
| Fabricantes | SamHop Microelectronics | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de SDUD40N03L (archivo pdf) en la parte inferior de esta página. Total 7 Páginas | ||
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S DU/D40N03L
S amHop Microelectronics C orp.
May,2004 ver1.1
N-C hannel Logic Level E nhancement Mode Field E ffect Transistor
P R ODUC T S UMMAR Y
VDS S
30V
ID R DS (ON) ( m W ) Max
10 @ VGS = 10V
42A
16 @ VGS = 4.5V
F E AT UR E S
S uper high dense cell design for low R DS(ON).
R ugged and reliable.
TO-252 and TO-251 P ackage.
D
G
S
S DU S E R IE S
T O -252AA(D-P AK )
GDS
S DD S E R IE S
TO-251(l-P AK)
D
G
S
ABS OLUTE MAXIMUM R ATINGS (TC=25 C unless otherwise noted)
P arameter
Drain-S ource Voltage
Gate-S ource Voltage
Drain C urrent-C ontinuous @ TJ=125 C
-P ulsed a
Drain-S ource Diode Forward C urrent
S ymbol
VDS
VGS
ID
IDM
IS
Limit
30
20
42
105
40
Unit
V
V
A
A
A
Maximum P ower Dissipation @ Tc=25 C
PD
50
W
Operating and S torage Temperature R ange TJ, TS TG
-55 to 175
C
THE R MAL CHAR ACTE R IS TICS
Thermal R esistance, Junction-to-C ase
R JC
3 C/W
Thermal R esistance, Junction-to-Ambient
R JA
50
C /W
1
1 page  
S DU/D40N03L
V DD
V IN R L
D VOUT
VG S
RGEN G
S
F igure 11. S witching T es t C ircuit
td(on)
VOUT
ton
tr
td(off)
90%
10% INVE R TE D
toff
tf
90%
10%
VIN
10%
90%
50% 50%
PULS E WIDTH
F igure 12. S witching Waveforms
6
2
1
D =0 . 5
0.2
0.1
0.1 0.05
0.02
0.01
0.01
10-5
S INGLE PULS E
10-4
10-3
10-2
10-1
S quare Wave P uls e Duration (s ec)
P DM
t1
t2
1. R JA (t)=r (t) * R JA
2. R JA=S ee Datas heet
3. T J M-T A = P DM* R J A (t)
4. Duty C ycle, D=t1/t2
1
10
F igure 13. Normalized T hermal T rans ient Impedance C urve
5
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet SDUD40N03L.PDF ] | |
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