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PDF MN66279RSC Data sheet ( Hoja de datos )

Número de pieza MN66279RSC
Descripción LSI FOR COMPACT DISC/CD ROM PLAYER
Fabricantes Panasonic 
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MLSNIs66fo2r7C90oRmSpCact Disc/CD-ROM Player
MN66279RSC
1. Type
Signal processing LSI for CDs (Compact Discs)
2. Overview
MN662790RSC is a signal processing LSI for CDs which is applicable to 4x-speed playback. It
incorporates optical servo (focus, tracking and traverse servos) processing function, digital signal
processing function (EFM demodulation and error correction), digital servo processing function for
spindle motor, a digital filter and D/A converter. All the processing functions after the head
amplifier (RF amplifier) are incorporated into a single chip. In addition, it incorporates clock
generation and error correction circuits to increase the playability and is applicable to video CD
playback.
3. Functions and features
(Optical servo)
Focus (Fo), tracking (Tr) and traverse (TRV) servos
(fS: Fo 44.1 kHz, Tr 44.1 kHz)
Automatic adjustment functions (Fo/Tr gain, Fo/Tr offset, Fo/Tr balance)
On-chip D/A converter for drive voltage output
Provided with a countermeasure for dropout
Provided with anti-shock function
Provided with track cross detecting function
On-chip track cross counter
(Digital signal processing)
Containing DSL and PLL
Provided with a frame synchronous detection/protection/interpolation
Subcode data processing
Q-data CRC check
On-chip Q-data register
CD-TEXT interface function
On-chip CD-TEXT register (144 bits 2)
CIRC error correction
C1 decoder double error correction
C2 decoder triple error correction, quadruple error correction
On-chip de-interleaving 16K RAM
Audio data interpolation processing
4-sampling average value interpolation and previous value hold
Digital attenuation (256 levels)
Soft attenuation (256 levels)
Soft muting
Digital audio interface (EIAJ format)
Audio data serial interface (Input/Output)
Microcomputer serial interface
General-purpose I/O port (4 pins)
Audio data peak level detection function
Publication data: July 2002
SDD00025AEM
1

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MN66279RSC pdf
MN662790RSC
6. Pin descriptions
No. Symbol
Pin for
I/O 5-V input
1 BCLK
O
Bit clock output for SRDATA
Function
2 LRCK
O
L/R identification signal output
3 SRDATA O
Serial data output
4 DVDD1
5 DVSS1
6 TX
7 MCLK
8 MDATA
I
I
O
I
I
Power supply for digital circuits
Ground for digital circuits
Digital audio interface output signal
Microcomputer command clock signal input
(Latches the data at a rising edge)
Microcomputer command data signal input
9 MLD
I
Microcomputer command load signal input L: Load
10 SENSE
O
Sense signal output (OFT, FESL, ACEND, AJEND, SFG)
11 FLOCK
12 TLOCK
13 BLKCK
O
O
O
14 SQCK/
GIO0
I
Focus servo pull-in signal
(L: Pull-in status)
Tracking servo pull-in signal
(L: Pull-in status)
Subcode block clock signal
(fBLKCK 75 Hz)
At command execution: CD-TEXT data reading enable signal (DQSY) output
At default value:
External clock input for subcode Q register
At command execution: General-purpose I/O port
In CD-TEXT 2 mode: Clock input for TEXT data reading
15 SUBQ
O
Subcode Q-data output
In CD-TEXT 2 mode: TEXT data output
16 DMUTE
I
Muting input
H: Mute
17 STAT
O
Status signal (CRC, STCNT, CLVS, TTSTOP, JCLVS, SQOK, FLAG6,
SENSE, FLOCK, TLOCK, rotating speed data, FCLV, SUBQ, SYFLG)
In CD-TEXT 3 mode: Subcode Q and TEXT data output
18 RST
19 SMCK
20 CSEL
I
O
I
Reset input
L: Reset
8.4672-MHz clock signal output at MSEL H
4.2336-MHz clock signal output at MSEL L
Oscillation frequency selection pin
H: 33.8688 MHz
L: 16.9344 MHz
SDD00025AEM
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MN66279RSC arduino
MN662790RSC
7-0 (2) Signal processing section
1) Signal processing over the system
Applicable for VIDEO CDs
Error correction method
Selectable between double (C1) and triple (C2) corrections, and double (C1) and quadruple (C2)
corrections
C1 flag discrimination condition at C2 correction selectable
PLL circuit for VIDEO CDs (Digital PLL)
Other functions
Audio interpolation processing 4-sampling interpolation
Addition of CD-TEXT output format 4 mode
Peak data output function (Same as the specification for MN662780)
Audio output level attenuation function
Pitch control function ( 50 of 1x-, 2x- and 4x-speed)
Error flag counting function (selectable between FLAG0 and IPFLAG)
TX output generation from audio DAC external input data (Conventional method is also selectable)
2) DSL, PLL
PLLF current selection mode ( 1, 0.75, 0.5, 1.25)
PLL frequency dividing function
Digital PLL control
Charge pump current adjusting function
3) Digital audio interface (TX)
Bit V control of TX output
Generation of TX output from DF input data
4) Spindle servo
CLV synchronization establishment detecting flag
SDD00025AEM
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