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PDF XRD98L23 Data sheet ( Hoja de datos )

Número de pieza XRD98L23
Descripción 8-Bit High-speed Linear CIS/CCD Sensor Signal Processor with Serial Control
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No Preview Available ! XRD98L23 Hoja de datos, Descripción, Manual

XRD98L23
8-Bit, High-speed Linear CIS/CCD Sensor
Signal Processor with Serial Control
FEATURES
· 8-Bit Resolution, No Missing Codes
· One-channel 10MSPS Pixel Rate
· Dual-channel 5MSPS Pixel Rate
· Three-channel 3 MSPS Pixel Rate
· 6-bit Programmable Gain Amplifier
· 8-bit Programmable Offset Adjustment
· CIS or CCD Compatibility
· Internal Clamp for CIS or CCD AC Coupled
Configurations
· 3.3V Operation & I/O Compatibility
· Serial Load Control Registers
· Low Power CMOS: 75mW-typ
· Low Cost 20-Lead Packages
· USB Compliant
November 2002-2
APPLICATIONS
· Check Scanners
· General Purpose CIS or CCD Imaging
· Low Cost Data Acquisition
· Simple and Direct Interface to Canon 600 DPI
Sensors
GENERAL DESCRIPTION
The XRD98L23 is a complete linear CIS or CCD sensor
signal processor on a single monolithic chip. The
XRD98L23 includes a high speed 8-bit resolution ADC,
a 6-bit Programmable Gain Amplifier with gain adjust-
ment of 1 to 10, and a typical 8-bit programmable input
referred offset calibration range of 480mV.
In the CCD configuration the input signal is AC coupled
with an external capacitor. An internal clamp sets the
black level. In the CIS configuration, the clamp switch
can be disabled and the CIS output signal is DC
coupled from the CIS sensor to the XRD98L23. The
CIS signal is level shifted to VRB in order to use the full
range of the ADC. In the CIS configuration the input can
also be AC coupled similar to the CCD configuration.
This enables CIS signals with large black levels to be
internally clamped to a DC reference equal to the black
level. The DC reference is internally subtracted from
the input signal.
The CIS configuration can also be used in other
applications that do not require CDS function, such as
low cost data acquisition.
ORDERING INFORMATION
PackageType
20-Lead SOIC
20-Lead SSOP
TemperatureRange
0°C to +70°C
0°C to +70°C
PartNumber
XRD98L23ACD
XRD98L23ACU
Rev. 1.00
EXAR Corporation, 48720 Kato Road, Fremont, CA 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com

1 page




XRD98L23 pdf
XRD98L23
ELECTRICAL CHARACTERISTICS (CONT'D)
Test Conditions: AVDD=DVDD=3.3V, ADCCLK=10MHz, 50% Duty Cycle, TA=25°C unless otherwise specified.
Symbol
Parameter
Buffer Specifications
IIL
CIN
VINPP
Input Leakage Current
Input Capacitance
AC Input Voltage Range
AC Input Voltage Range
VIN DC Input Voltage Range
DC Input Voltage Range
Min.
Typ.
Max. Unit Conditions
10
0
0
-0.1
V -0.1
DCEXT
100
AVDD-1.4
nA
pF
V
DV
REF
V
AVDD-1.4 V
V+
DCEXT
DVREF
V
CIS AC; INT VDCREF
Config Reg
=> XXX010XX
Gain=1 (Note 1)
CCD AC; INT V
DCREF
Config Reg
=> XXX011XX
Gain=1 (Note 1)
CIS DC; INT VDCREF
Config Reg
=> XXX000XX
Gain=1 (Note 2)
CIS DC; EXT V
DCREF
Config Reg
=> XXX100XX
Gain=1 (Note 3)
VDCEXT+DVREF < AVDD
VDCEXT
External DC Reference
VINBW
VINCT
Input Bandwidth (Small Signal)
Channel to Channel Crosstalk
Internal Clamp Specifications
V
CLAMP
Clamp Voltage
R Clamp Switch On Resistance
INT
R
OFF
Clamp Switch Off Resistance
0.3 AVDD/2 V CIS DC; EXT VDCREF
Config Reg
=> XXX100XX
10 MHz
-60 dB
AGND
50
mV CIS (AC) Config
2.1 VRT
V CCD (AC) Config
180 250
12 M
Note 1: VINPP is the signal swing before the external capacitor tied to the MUX inputs.
Note 2: The -0.1V minimum is specified in order to accommodate black level signals lower than the external DC
reference (clamp) voltage.
Note 3: The V -0.1V minimum is specified in order to accommodate black level signals lower than the external DC
DCEXT
reference voltage.
Rev. 1.00
5

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XRD98L23 arduino
XRD98L23
VCC (5V - 15V)
AVDD
C
I
S
N/C
N/C
0.1uF
19
RED
18
GRN
17
BLU
16
VDCEXT
15
VREF+
DB7/LD
DB6/SDATA
DB5/SCLK
DB4
DB3
DB2
DB1
DB0
ADCCLK
CLAMP
SYNCH
9
8
7
6
5
4
3
2
11
12
13
AVDD
DVDD (3V)
20
AVDD
DVDD
1
14
AGND
DGND 10
AGND
XRD98L23
DIGITAL
ASIC
DGND
Figure 5. Typical Application Circuitry CIS DC Coupled Non-Inverted Mode with
VDC External Offset Compensation
Rev. 1.00
11

11 Page







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