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PDF SED1190 Data sheet ( Hoja de datos )

Número de pieza SED1190
Descripción CMOS LCD 64-COMMON DRIVERS
Fabricantes ETC 
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SED1190
CMOS LCD 64-COMMON DRIVERS
s DESCRIPTION
The SED1190 is a dot matrix LCD common (row) driver for driving high-capacity LCD panel at duty cycles
higher than 1/64. The LSI uses two serially connected, 32-bit shift registers to hold the display data, and level
shifter converts the TTL level 64-bit parallel data from the shift registers to levels suitable for use by the LCD
drive circuitry. The SED1190 generates common drive signals using the voltages supplied to LCD drive
voltages pins.
The SED1190 is used in conjunction with the SED1180 (64-bit row driver) to drive a large capacity dot matrix
LCD panel.
s FEATURES
Low-power CMOS technology
64-bit common (row) driver
Display blanking
Duty cycle: 1/64 to 1/128
Daisy chain enable support
s SYSTEM BLOCK DIAGRAM
Wide range of LCD voltage: –14V to –25V
Supply voltage: 5.0V ±10%
Package: ............................... QFP1-80 pin (F0A)
QFP5-80 pin (F5A)
DIE: Al pad chip (D0A)
LCD
CONTR
D0 ~ D3
XSCL
LP, FR
YSCL
YD
SED1180
64
SED1190 64
SED1180
64
SED1180
64
256SEG × 64 COM
DUTY: 1/64
SED1180F
64
705

1 page




SED1190 pdf
SED1190
DC Characteristics
(VDD = 0V, VSS = –5.0 V ±10%, Ta = –20 to 75°C)
Parameter
Supply voltage (1)
Supply voltage (2)
High level input voltage
Low level input voltage
High level output voltage
Low level output voltage
Input leakage current
Output leakage current
Shift clock
Frame signal
Input capacitance
Common output on
resistance
Quiescent current
Symbol
VSS
V1
V4
VSSH
VIH
VIL
VOH
VOL
ILI
ILO
YSCL
FR
CI
RCOM
IQ
Conditions
Rating
Min Typ Max
–5.5 –5.0 –4.5
VSSH
VDD
VSSH
VDD
Recommended VSSH
–25.0 — –14.0
Operable VSSH (see note)
–25.0 — –5.0
0.2VSS — VDD+0.3
VSS–0.3 — 0.8VSS
IOH = –0.6 mA
–0.4 —
IOL = 0.6 mA
— — VSS+0.4
0 V VI VSS
— 0.05 2.0
0 V VO VSS
— 0.05 5.0
— — 2.5
— 1/60 —
Ta = 25°C
— 5.0 8.0
VOH = VDD –0.5 V
VOL = VSSH +0.5 V
COM bit
VSSH = –20.0 V
VSSH = –14.0 V
VSSH = –9.0 V
0.8 1.0
0.9 1.3
1.3 2.0
VSSH = –5.0 V —
3.0 30.0
SED VSSH = –25 V, VSSH = –5.5 V,
1190 VI = VDD
0.05
30
Unit
V
V
V
V
V
V
V
V
V
µA
µA
MHz
s
pF
k
µA
VSS = –5.0 V,
VIH = VDD,
VIL = VSS,
YSCL cycle =
Operating current for
ISS FR cycle = 16.7 ms 130 µs
— 3.0 8.0
the logic
(duty 50%), All
“H” output
terminals are
opened at every
data input all
1/128 duty.
VSS = –4.5 V,
V1 = –2.0 V,
V4 = –18.0 V,
YSCL cycle =
Operating current for LCD ISSH FR cycle = 16.7 ms 130 µs
— 3.0 8.0
(duty 50%), All
“H” output
terminals are
opened at every
data input of
1/128 duty.
Pull up MOS current
–Ip VSS = –5.0 V, VIL = –5.0 V
Applicable to LAT input terminals
10.0 25.0 50.0
µA
µA
µA
Note: Error free operation is guaranteed in this range but the output resistance of the LCD drivers is higher than in the recommended
operating range. It is suggested that the driver is tested with the target LCD panel to determine if performance is acceptable.
709

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