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PDF SED1180 Data sheet ( Hoja de datos )
| Número de pieza | SED1180 | |
| Descripción | CMOS LCD 64-SEGMENT DRIVER | |
| Fabricantes | ETC | |
| Logotipo |  |
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SED1180
SED1180
CMOS LCD 64-SEGMENT DRIVER
s DESCRIPTION
The SED1180 is a dot matrix LCD segment (column) driver for driving high-capacity LCD panel at duty cycles
higher than 1/64. The LSI contains 64-bit shift register for display data. The display data is supplied through
4-bit bus, and serially transferred through 16 × 4 bit shift register. The display data is held in a 64-bit latch
circuit. The LSI converts the level of the latched data to an LCD drive waveform.
The SED1180 is used in conjunction with the SED1190 (64-bit row driver) to drive a large-capacity dot matrix
LCD panel.
s FEATURES
• Low-power CMOS technology
• 64-bit segment (column) driver
• High-speed 4-bit data
• Duty cycle ..................................... 1/64 to 1/128
• Daisy chain enable support
• Wide range of LCD voltage .......... –14V to –25V
• Supply voltage .................................. 5.0V ±10%
• Package ................................ QFP1-80 pin (F0A)
QFP5-80 pin (F5A)
DIE: Al pad chip (D0A)
s SYSTEM BLOCK DIAGRAM
LCD
CONTR
D0 ~ D3
XSCL
LP, FR
YSCL
YD
SED1180
64
SED1190 64
SED1180
64
SED1180
64
256 SEG × 64 COM
DUTY: 1/64
SED1180
64
425
1 page  
SED1180
s ELECTRICAL CHARACTERISTICS
• DC Electrical Characteristics
(VDD = 0V, VSS = –5.0 V ± 10%, Ta = –20 to 75°C)
Parameters
Symbol
Condition
Rating
Min Typ Max
Unit
Supply voltage (1)
VSS
–5.5 –5.0 –4.5 V
V2
VSSH
—
VDD
V
Supply voltage (2)
V3
VSSH
Recommended VSSH
Operable VSSH (see note)
VSSH
—
VDD
V
–25.0 — –14.0 V
–25.0 — –5.0 V
HIGH-level input voltage
VIH
0.2VSS — VDD–0.3 V
LOW-level input voltage
VIL
VSS–0.3 — 0.8VSS V
HIGH-level output voltage VOH
IOH = -0.6 ma
-0.4 — — V
LOW-level output voltage
Input leakage current
Output leakage current
VOL
ILI
ILO
IOL = 0.6 ma
0 V ≤ VI ≤ VSS
0 V ≤ VO ≤ VSS
— — VSS+0.4 V
— 0.05 2.0 µA
— 0.05 5.0 µA
Shift clock
XSCL
— — 6.0 MHz
Frame signal
Input capacitance
FR
CI
Ta = 25°C
— 1/60 —
— 5.0 8.0
S
pF
Segment output on
resistance
RSEG
VSSH = –20.0 V
VOH = VDD = –0.5 V
VOL = VSSH = +0.5 V VSSH = –14.0 V
SEG bit
VSSH = –9.0 V
—
—
—
1.9 2.9
2.4 3.9
3.6 7.0
kΩ
VSSH = –5.0 V — 11.5 500.0
Quiescent current
IQ VSSH = –25 V, VSSH = –5.5 V, VI = VDD —
0.05
30
µA
Operating current for the
logic
Operating current for the
LCD
ISSO
FR cycle = 16.7 ms
ECL cycle = 13 µS
ISSHO
FR cycle = 16.7 ms
ECL cycle = 13 µS
VSS = –5.0 V,
VIH = VDD,
VIL = VSS,
LP cycle=130 µS,
XSCL=1.5 MHz,
(duty 50%)
All data input
reversed bit by
bit. All output
pins are open.
VSS = –4.5 V,
V2 = –4.0 V,
V1 = –16.0 V,
VSSH = –20.0 V,
VIH = VDD,
VIL = VSS,
XSCL=1.5 MHz,
(duty 50%),
all data input
reversed bit by
bit. All output
pins are open.
—
—
90 200 µA
40 80 µA
(continued)
429
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet SED1180.PDF ] | |
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