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Número de pieza SAA4963
Descripción Integrated NTSC comb filter
Fabricantes Philips 
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INTEGRATED CIRCUITS
DATA SHEET
SAA4963
Integrated NTSC comb filter
Preliminary specification
Supersedes data of 1996 Nov 22
File under Integrated Circuits, IC02
1997 Mar 03

1 page




SAA4963 pdf
Philips Semiconductors
Integrated NTSC comb filter
Preliminary specification
SAA4963
FUNCTIONAL DESCRIPTION
Functional requirements
The NTSC comb filter processes the video standard
NTSC M. For SVHS signals the input signals are
bypassed to the output without processing by selecting the
SVHS mode.
A sync separation circuit is incorporated to generate
control signals for the internal clock processing. With a
sync compression of up to 12 dB (see Fig.5) the sync
separator works properly.
The IC is controlled via the pin SVHS (pin 2) which forces
the IC into the SVHS mode (bypass) if the comb filter
function is not desired. It is possible to select the following
modes:
COMB-mode: Luminance and chrominance comb filter
function active, if SVHS mode not active
SVHS-mode: No IC function active, all clocks inactive,
Cext (pin 7) is bypassed to CO (pin 9) and Yext (pin 14) is
bypassed to YO (pin 11). This mode is forced via SVHS
(pin 2).
The mode changes from SVHS to COMB and vice versa
are always performed asynchronously with respect to the
vertical blanking interval.
Pin description
FSC (PIN 1)
Input for the reference frequency fsc (see note 3 of Chapter
“Characteristics”). For SVHS signals the signal
performance can be increased by switching the input
signal at FSC off.
SVHS (PIN 2)
Input signal that controls the operation mode. An internal
low-pass filter suppresses the subcarrier frequencies.
Thus applications are supported where the operation
mode (COMB or SVHS) is controlled by the DC level of the
FSC input signal at pin 1. For those applications the SVHS
input can be externally connected to FSC (pin 1).
Table 1 SVHS function
SVHS
LOW
HIGH
SELECTED MODE
COMB
SVHS (PLL and clock processing stopped)
The PLL and the clock processing are always stopped if
the selected level for SVHS is applied to SVHS
(independent of the vertical pulse).
VCCA, VCCO, VDDD AND VCCPLL (PINS 4, 6, 15 AND 18)
Supply voltages.
AGND, OGND, DGND AND PLLGND (PINS 5, 8,
16 AND 17)
Ground connection. AGND is used as signal reference for
all analog input and output signals.
Cext (PIN 7)
Input for an external chrominance signal which is
correlated with the external VBS signal in SVHS-mode.
CO (PIN 9)
Chrominance output signal. This output delivers the comb
filtered chrominance from the CVBS signal in
COMB-mode or the external chrominance signal from the
input Cext if the IC is forced into the SVHS-mode.
In COMB-mode the output is delayed by an additional
processing delay.
Table 2 CO output signal
MODE
CO OUTPUT SIGNAL
COMB comb filtered chrominance signal
SVHS external chrominance signal from Cext input
REFDL (PIN 10)
Decoupling capacitor for the delay line reference voltage.
YO (PIN 11)
VBS output signal. This output delivers the comb filtered
luminance signal (including synchronization pulses) in
COMB-mode or the external (C)VBS signal from the input
Yext if the IC is forced into SVHS-mode. In COMB-mode
the output is delayed by an additional processing delay.
Table 3 YO output signal
MODE
COMB
SVHS
YO OUTPUT SIGNAL
comb filtered luminance signal
external (C)VBS signal from Yext input
1997 Mar 03
5

5 Page





SAA4963 arduino
Philips Semiconductors
Integrated NTSC comb filter
Preliminary specification
SAA4963
SYMBOL
PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
CVBS (pin 13)
V13 input voltage (AC coupled)
I13 input current
V13 DC voltage during black level
Z13 source impedance
Yext (pin 14)
V14 input voltage (AC coupled)
I14 input current
V14 DC voltage during black level
Z14 source impedance
VDDD (pin 15)
IDDD
supply current
VCCPLL (pin 18)
I18 supply current
REFBP (pin 20)
V20 DC voltage
Notes
12 dB sync compression
possible; see Fig.5
during sync pulse;
main clamp active
during active video;
main clamp active
12 dB sync compression
possible; see Fig.5
during sync pulse;
pre clamp active
during active video;
pre clamp active
3 0
+3 dB
30 16
µA
2.2 4.5 µA
1.1 1.25 1.4 V
− − 1 k
3 0
+3 dB
30 20
µA
2.2 4.5 µA
1.1 1.25 1.4 V
− − 1 k
3 6 mA
1.5 2.5 mA
1.1 1.25 1.4 V
1. V = VCCA VDDD 300 mV
V = VCCA VCCO 300 mV
V = VCCO VDDD 300 mV
V = VCCA VCCPLL 300 mV
V = VCCO VCCPLL 300 mV
V = VDDD VCCPLL 300 mV
2. Input AC voltage and detection level are valid for sine wave signals and for square wave signals with a duty factor of
0.4 to 0.6.
3. Subcarrier frequency fsc = 3.579545 MHz.
4. Line frequency fH = 15.734264 kHz.
1997 Mar 03
11

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