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PDF SAA3010 Data sheet ( Hoja de datos )

Número de pieza SAA3010
Descripción Infrared remote control transmitter RC-5
Fabricantes Philips 
Logotipo Philips Logotipo



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No Preview Available ! SAA3010 Hoja de datos, Descripción, Manual

INTEGRATED CIRCUITS
DATA SHEET
SAA3010
Infrared remote control transmitter
RC-5
Product specification
File under Integrated Circuits, IC01
June 1989

1 page




SAA3010 pdf
Philips Semiconductors
Infrared remote control transmitter RC-5
Product specification
SAA3010
handbook, full pagewidth
DR0 DR1 DR2 DR3 DR4 DR5 DR6 DR7
17 16 15 13 12 11 10
X0
21
9
X1
22
X2
23
X3
24
X4
25
X5
26
X6
27
SAA3010
X7
1
Z0
3
Z1
4
Z2
5
Z3
6
8 7 2 20 19 18
DATA MDATA SSM TP1 TP2 OSC
MGE348
Fig.3 Keyboard interconnection.
June 1989
5

5 Page





SAA3010 arduino
Philips Semiconductors
Infrared remote control transmitter RC-5
Product specification
SAA3010
Combined system mode (SSM is LOW)
The X and Z sense inputs have p-channel pull-up transistors, so that they are HIGH, until pulled LOW by connecting them
to an output as the result of a key operation. Legal operation of a key in the X-DR or Z-DR matrix will start the debounce
cycle, once key contact has been established for 18 bit-times without interruption, the oscillator enable signal is latched
and the key may be released. An interruption within the 18 bit-time period resets the device.
At the end of the debounce cycle the DR-outputs are switched off and two scan cycles are started, that switch on the
DR-lines one by one. When a Z- or X-input senses a low level, a latch enable signal is fed to the system (Z-input) or
command (X-input) latches.
After latching a system number the device will generate the last command (i.e. all command bits logic 1) in the chosen
system for as long as the key is operated. Latching of a command number causes the chip to generate this command
together with the system number memorized in the system latch. Releasing the key will reset the device if no data is to
be transmitted at the time. Once transmission has started the code will complete to the end.
Single system mode (SSM is HIGH)
In the single system mode, the X-inputs will be HIGH as in the combined system mode. The Z-inputs will be disabled by
having their pull-up transistors switched off; a wired connection in the Z-DR matrix provides the system code. Only legal
key operation in the X-DR matrix will start the debounce cycle, once key contact has been established for 18 bit-times
without interruption the oscillator enable signal is latched and the key may be released. An interruption within the
18 bit-time period resets the internal action.
At the end of the debounce cycle the pull-up transistors in the X-lines are switched off and those in the Z-lines are
switched on for the first scan cycle. The wired connection in the Z-matrix is then translated into a system number and
memorized in the system latch. At the end of the first scan cycle the pull-up transistors in the Z-lines are switched off and
the inputs are disabled again; the pull-up transistors in the X-lines are switched on. The second scan cycle produces the
command number which, after being latched, is transmitted together with the system number.
Key release detection
An extra control bit is added which will be complemented after key release; this indicates to the decoder that the next
code is a new command. This is important in the case where more digits need to be entered (channel numbers of Teletext
or Viewdata pages). The control bit will only be complemented after the completion of at least one code transmission.
The scan cycles are repeated before every code transmission, so that even with “take over” of key operation during code
transmission the right system and command numbers are generated.
Reset action
The device will be reset immediately a key is released during:
debounce time
between two codes.
When a key is released during matrix scanning, a reset will occur if:
a key is released while one of the driver outputs is in the low ohmic stage (logic 0)
a key is released before that key has been detected
there is no wired connection in the Z-DR matrix when SSM is HIGH.
June 1989
11

11 Page







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