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PDF OPA689 Data sheet ( Hoja de datos )

Número de pieza OPA689
Descripción Wideband / High Gain VOLTAGE LIMITING AMPLIFIER
Fabricantes Burr-Brown 
Logotipo Burr-Brown Logotipo



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®
OPA689
OPA689
OPA689
For most current data sheet and other product
information, visit www.burr-brown.com
Wideband, High Gain
VOLTAGE LIMITING AMPLIFIER
FEATURES
q HIGH LINEARITY NEAR LIMITING
q FAST RECOVERY FROM OVERDRIVE: 2.4ns
q LIMITING VOLTAGE ACCURACY: ±15mV
q –3dB BANDWIDTH (G = +6): 280MHz
q STABLE FOR G +4
q SLEW RATE: 1600V/µs
q ±5V AND +5V SUPPLY OPERATION
q LOW GAIN VERSION: OPA688
DESCRIPTION
The OPA689 is a wideband, voltage feedback op amp
that offers bipolar output voltage limiting, and is stable
for gains +4. Two buffered limiting voltages take
control of the output when it attempts to drive beyond
these limits. This new output limiting architecture holds
the limiter offset error to ±15mV. The op amp operates
linearly to within 30mV of the limits.
The combination of narrow nonlinear range and low
limiting offset allows the limiting voltages to be set within
100mV of the desired linear output range. A fast 2.4ns
recovery from limiting ensures that overdrive signals will
be transparent to the signal channel. Implementing the
APPLICATIONS
q TRANSIMPEDANCE WITH FAST
OVERDRIVE RECOVERY
q FAST LIMITING ADC INPUT DRIVER
q LOW PROP DELAY COMPARATOR
q NON-LINEAR ANALOG SIGNAL
PROCESSING
q DIFFERENCE AMPLIFIER
q IF LIMITING AMPLIFIER
q AM SIGNAL GENERATION
limiting function at the output, as opposed to the input,
gives the specified limiting accuracy for any gain, and
allows the OPA689 to be used in all standard op amp
applications.
Non-linear analog signal processing circuits will benefit
from the OPA689’s sharp transition from linear operation
to output limiting. The quick recovery time supports high
speed applications.
The OPA689 is available in an industry-standard pinout
in PDIP-8 and SO-8 packages. For lower gain applica-
tions requiring output limiting with fast recovery, con-
sider the OPA688.
2.5
2.0
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
–2.5
LIMITED OUTPUT RESPONSE
G = +6
VH = 2.0V
VO VL = –2.0V
VIN
Time (200ns/div)
2.10
2.05
2.00
1.95
1.90
1.85
1.80
1.75
1.70
1.65
1.60
DETAIL OF LIMITED OUTPUT VOLTAGE
VO
Time (50ns/div)
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111
Twx: 910-952-1111 • Internet: http://www.burr-brown.com/ • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
©1997 Burr-Brown Corporation
PDS-11409D
OPA689Printed in U.S.A. January, 2000
®

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OPA689 pdf
SPECIFICATIONS — VS = +5V (cont.)
G = +6, RF = 750Ω, RL = 500tied to VCM = 2.5V, VL = VCM –1.2V, VH = VCM +1.2V, (Figure 2 for AC performance only), unless otherwise noted.
OPA689U, P
TYP
GUARANTEED(1)
PARAMETER
CONDITIONS
+25°C
+25°C
0°C to
+70°C
–40°C to
+85°C
MIN/ TEST
UNITS MAX LEVEL(2)
THERMAL CHARACTERISTICS
Temperature Range
Thermal Resistance
P 8-Pin DIP
U 8-Pin SO-8
Specification: P, U
–40 to +85 — — — °C Typ C
100 — — — °C/W Typ C
125 — — — °C/W Typ C
NOTES: (1) Junction Temperature = Ambient Temperature for low temperature limit and 25°C guaranteed specifications. Junction Temperature = Ambient Temperature
+ 23°C at high temperature limit guaranteed specifications. (2) TEST LEVELS: (A) 100% tested at 25°C. Over temperature limits by characterization and simulation.
(B) Limits set by characterization and simulation. (C) Typical value for information only. (3) Current is considered positive out of node. (4) CMIR tested as < 3dB
degradation from minimum CMRR at specified limits. (5) IVH (VH bias current) is negative, and IVL (VL bias current) is positive, under these conditions. See Note 3 and
Figures 2 and 7. (6) Limiter feedthrough is the ratio of the output magnitude to the sinewave added to VH (or VL) when VIN = 0. (7) VH slew rate conditions are: VIN
= VCM +0.4V, G = +6, VL = VCM –1.2V, VH = step between VCM +1.2V and VCM. VL slew rate conditions are similar. (8) Linearity Guardband is defined for an output
sinusoid (f = 5MHz, VO = VCM ±1Vp-p) centered between the limiter levels (VH and VL). It is the difference between the limiter level and the peak output voltage where
SFDR decreases by 3dB (see Figure 8).
ABSOLUTE MAXIMUM RATINGS
Supply Voltage ................................................................................. ±6.5V
Internal Power Dissipation ........................... See Thermal Characteristics
Input Voltage Range ............................................................................ ±VS
Differential Input Voltage ..................................................................... ±VS
Limiter Voltage Range ........................................................... ±(VS – 0.7V)
Storage Temperature Range: P, U ................................ –40°C to +125°C
Lead Temperature (DIP, soldering, 10s) ...................................... +300°C
(SO-8, soldering, 3s) ...................................... +260°C
Junction Temperature .................................................................... +175°C
ABSOLUTE MAXIMUM RATINGS
Top View
DIP-8, SO-8
NC 1
Inverting Input 2
Non-Inverting Input 3
–VS 4
8 VH
7 +VS
6 Output
5 VL
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.
PACKAGE/ORDERING INFORMATION
PRODUCT
OPA689P
OPA689U
"
PACKAGE
DIP-8
SO-8 Surface Mount
"
PACKAGE
DRAWING
NUMBER
006
182
"
SPECIFIED
TEMPERATURE
RANGE
–40°C to +85°C
–40°C to +85°C
"
PACKAGE
MARKING
OPA689P
OPA689U
"
ORDERING
NUMBER(1)
OPA689P
OPA689U
OPA689U/2K5
TRANSPORT
MEDIA
Rails
Rails
Tape and Reel
NOTES: (1) Models with a slash (/) are available only in Tape and Reel in the quantities indicated (e.g., /2K5 indicates 2500 devices per reel). Ordering 2500 pieces
of “OPA689U/2K5” will get a single 2500-piece Tape and Reel.
®
5 OPA689

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OPA689 arduino
TYPICAL APPLICATIONS
DUAL SUPPLY, NON-INVERTING AMPLIFIER
Figure 1 shows a non-inverting gain amplifier for dual
supply operation. This circuit was used for AC characteriza-
tion of the OPA689, with a 50source, which it matches,
and a 500load. The power supply bypass capacitors are
shown explicitly in Figures 1 and 2, but will be assumed in
the other figures. The limiter voltages (VH and VL) and their
bias currents (IVH and IVL) have the polarities shown.
SINGLE SUPPLY, NON-INVERTING AMPLIFIER
Figure 2 shows an AC coupled, non-inverting gain amplifier
for single supply operation. This circuit was used for AC
+VS = +5V
3.01k1.91k
+
2.2µF
0.1µF
0.1µF
VH = +2V
100
37
VIN 8 IVH
49.9
OPA689 6
RG
150
2
RF
750
4
5
IVL
VO
500
–VS = –5V
0.1µF
0.1µF
VL = –2V
+
2.2µF
3.01k1.91k
characterization of the OPA689, with a 50source, which
it matches, and a 500load. The power supply bypass
capacitors are shown explicitly in Figures 1 and 2, but will
be assumed in the other figures. The limiter voltages (VH
and VL ) and their bias currents (IVH and IVL ) have the
polarities shown. Notice that the single supply circuit can
use 3 resistors to set VH and VL, where the dual supply
circuit usually uses 4 to reference the limit voltages to
ground.
LOW DISTORTION, ADC INPUT DRIVER
The circuit in Figure 3 shows an inverting, low distortion
ADC driver that operates on single supply. The converter’s
internal references bias the op amp input. The 4.0pF and
18pF capacitors form a compensation network that allows
VS = +5V
+
2.2µF
0.1µF
0.1µF
1.50k
0.1µF
37
IVH
VIN 8
53.6
1.50kOPA689 6
2
4
5
IVL
RF
750
RG
150
0.1µF
0.1µF
523
VH = 3.7V
976
0.1µF
VO
500
VL = 1.3V
523
FIGURE 1. DC-Coupled, Dual Supply Amplifier.
FIGURE 2. AC-Coupled, Single Supply Amplifier.
VS = +5V
4.0pF
787
VH = +3.6V
0.1µF
0.1µF 374
VIN
18pF
750
VS = +5V
27
OPA689 8 6
35
4
24.9
100pF
0.1µF
1.40k
1.40k
100
VS = +5V
+3.5V
REFT
RSEL
+VS
IN
ADS822
10-Bit
40MSPS
10-Bit
Data
REFB INT/EXT GND
+1.5V
100
0.1µF
+2.5V
VL = +1.4V
787
FIGURE 3. Low Distortion, Limiting ADC Input Driver.
11
OPA689
®

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