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PDF OPA620 Data sheet ( Hoja de datos )
| Número de pieza | OPA620 | |
| Descripción | Wideband Precision OPERATIONAL AMPLIFIER | |
| Fabricantes | Burr-Brown | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de OPA620 (archivo pdf) en la parte inferior de esta página. Total 15 Páginas | ||
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® OPA620
OPA620
OPA620
OPA620
Wideband Precision
OPERATIONAL AMPLIFIER
FEATURES
q LOW NOISE: 2.3nV/√Hz
q HIGH OUTPUT CURRENT: 100mA
q FAST SETTLING: 25ns (0.01%)
q GAIN-BANDWIDTH PRODUCT: 200MHz
q UNITY-GAIN STABLE
q LOW OFFSET VOLTAGE: ±200µV
q LOW DIFFERENTIAL GAIN/PHASE ERROR
q 8-PIN DIP, SO-8 PACKAGES
APPLICATIONS
q LOW NOISE PREAMPLIFIER
q LOW NOISE DIFFERENTIAL AMPLIFIER
q HIGH-RESOLUTION VIDEO
q HIGH-SPEED SIGNAL PROCESSING
q LINE DRIVER
q ADC/DAC BUFFER
q ULTRASOUND
q PULSE/RF AMPLIFIERS
q ACTIVE FILTERS
DESCRIPTION
The OPA620 is a precision wideband monolithic opera-
tional amplifier featuring very fast settling time, low
differential gain and phase error, and high output
current drive capability.
The OPA620 is internally compensated for unity-gain
stability. This amplifier has a very low offset, fully
symmetrical differential input due to its “classical”
operational amplifier circuit architecture. Unlike “cur-
rent-feedback” amplifier designs, the OPA620 may be
used in all op amp applications requiring high speed
and precision.
Low noise and distortion, wide bandwidth, and high
linearity make this amplifier suitable for RF and video
applications. Short-circuit protection is provided by an
internal current-limiting circuit.
The OPA620 is available in plastic and ceramic DIP
and SO-8 packages. Two temperature ranges are of-
fered: –40°C to +85°C and –55°C to +125°C.
+VCC
7
Non-Inverting 3
Input
Inverting
Input
2
Current
Mirror
Output
Stage
CC
6 Output
4
–VCC
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111
Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
©1988 Burr-Brown Corporation
PDS-872G
Printed in U.S.A. September, 1993
1 page  
TYPICAL PERFORMANCE CURVES (CONT)
At VCC = ±5VDC, RL = 100Ω, and TA = +25°C, unless otherwise noted.
A V = +10V/V CLOSED-LOOP BANDWIDTH
vs OUTPUT VOLTAGE SWING
8
RL = 50Ω
6
4
2
0
1k
10k 100k 1M
10M 100M 1G
Frequency (Hz)
TOTAL INPUT VOLTAGE NOISE SPECTRAL DENSITY
vs SOURCE RESISTANCE
100
RS = 1kΩ
10 RS = 500Ω
RS = 100Ω
1 RS = 0Ω
0.1
100
1k
10k 100k 1M
10M 100M
Frequency (Hz)
INPUT CURRENT NOISE SPECTRAL DENSITY
100
10
1
0.1
100
1k
10k 100k 1M
10M 100M
Frequency (Hz)
INPUT VOLTAGE AND CURRENT NOISE
SPECTRAL DENSITY vs TEMPERATURE
3.1
fO = 100kHz
2.8
Current Noise
2.5
Voltage Noise
2.2
2.9
2.6
2.3
2.0
1.9
–75 –50 –25
1.7
0 +25 +50 +75 +100 +125
Ambient Temperature (°C)
+100
INPUT OFFSET VOLTAGE WARM-UP DRIFT
+50
0
–50
–100
0
1 23 4 5
Time from Power Turn-on (min)
6
+1000
INPUT OFFSET VOLTAGE CHANGE
DUE TO THERMAL SHOCK
+500
0 25°C
–500
SG TA = 25°C to TA = 125°C
Air Environment
K Grade
TA = 25°C to 70°C
Air Environment
–1000
–1
0 +1 +2 +3 +4
Time from Thermal Shock (min)
+5
®
5 OPA620
5 Page 
Many demanding high-speed applications such as ADC/
DAC buffers require op amps with low wideband output
impedance. For example, low output impedance is essential
when driving the signal-dependent capacitances at the inputs
of flash A/D converters. As shown in Figure 3, the OPA620
maintains very low closed-loop output impedance over
frequency. Closed-loop output impedance increases with
frequency since loop gain is decreasing with frequency.
10
1
G = +10V/V
When the output is shorted to ground, PDL = 5V x 150mA =
750mW. Thus, PD = 230mW + 750mW ≈ 1W. Note that the
short-circuit condition represents the maximum amount of
internal power dissipation that can be generated. Thus, the
“Maximum Power Dissipation” curve starts at 1W and is
derated based on a 175°C maximum junction temperature
and the junction-to-ambient thermal resistance, θJA, of each
package. The variation of short-circuit current with tempera-
ture is shown in Figure 5.
250
+ISC
200
0.1
G = +2V/V
G = +1V/V
0.01
100 1k 10k 100k 1M 10M 100M
Frequency (Hz)
FIGURE 3. Small-Signal Output Impedance vs Frequency.
THERMAL CONSIDERATIONS
The OPA620 does not require a heat sink for operation in
most environments. The use of a heat sink, however, will
reduce the internal thermal rise and will result in cooler,
more reliable operation. At extreme temperatures and under
full load conditions a heat sink is necessary. See “Maximum
Power Dissipation” curve, Figure 4.
1.2
Plastic DIP, SO-8
1.0 Packages
0.8 Cerdip
Package
0.6
0.4
0.2
150
– ISC
100
50
–75 –50 –25
0 +25 +50 +75 +100 +125
Ambient Temperature (°C)
FIGURE 5. Short-Circuit Current vs Temperature.
CAPACITIVE LOADS
The OPA620’s output stage has been optimized to drive
resistive loads as low as 50Ω. Capacitive loads, however,
will decrease the amplifier’s phase margin which may cause
high frequency peaking or oscillations. Capacitive loads
greater than 20pF should be buffered by connecting a small
resistance, usually 5Ω to 25Ω, in series with the output as
shown in Figure 6. This is particularly important when
driving high capacitance loads such as flash A/D converters.
In general, capacitive loads should be minimized for
optimum high frequency performance. Coax lines can be
driven if the cable is properly terminated. The capacitance of
coax cable (29pF/foot for RG-58) will not load the amplifier
when the coaxial cable or transmission line is terminated in
its characteristic impedance.
0
0 +25 +50 +75 +100
Ambient Temperature (°C)
FIGURE 4. Maximum Power Dissipation.
+125
+150
(RS typically 5Ω to 25Ω)
The internal power dissipation is given by the equation PD =
PDQ + PDL, where PDQ is the quiescent power dissipation and
PDL is the power dissipation in the output stage due to the
load. (For ±VCC = ±5V, PDQ = 10V x 23mA = 230mW, max).
For the case where the amplifier is driving a grounded load
(R )
L
with
a
DC
voltage
(±VOUT)
the
maximum
value
of
P
DL
occurs at ±VOUT = ±VCC/2, and is equal to PDL, max =
(±VCC)2/4RL. Note that it is the voltage across the output
transistor, and not the load, that determines the power
dissipated in the output stage.
OPA620
RS
RL
FIGURE 6. Driving Capacitive Loads.
11 OPA620
CL
®
11 Page | ||
| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet OPA620.PDF ] | |
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