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Número de pieza OP470
Descripción Very Low Noise Quad Operational Amplifier
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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a
Very Low Noise Quad
Operational Amplifier
OP470
FEATURES
Very Low-Noise, 5 nV/÷Hz @ 1 kHz Max
Excellent Input Offset Voltage, 0.4 mV Max
Low Offset Voltage Drift, 2 V/؇C Max
Very High Gain, 1000 V/mV Min
Outstanding CMR, 110 dB Min
Slew Rate, 2 V/s Typ
Gain-Bandwidth Product, 6 MHz Typ
Industry Standard Quad Pinouts
Available in Die Form
GENERAL DESCRIPTION
The OP470 is a high-performance monolithic quad operational
amplifier with exceptionally low voltage noise, 5 nV/X/ Hz at
1 kHz Max, offering comparable performance to ADI’s industry
standard OP27.
The OP470 features an input offset voltage below 0.4 mV,
excellent for a quad op amp, and an offset drift under 2 mV/C,
guaranteed over the full military temperature range. Open loop
gain of the OP470 is over 1,000,000 into a 10 kW load ensuring
excellent gain accuracy and linearity, even in high gain applica-
tions. Input bias current is under 25 nA, which reduces errors
due to signal source resistance. The OP470’s CMR of over
110 dB and PSRR of less than 1.8 mV/V significantly reduce
errors due to ground noise and power supply fluctuations.
Power consumption of the quad OP470 is half that of four
OP27s, a significant advantage for power conscious applica-
tions. The OP470 is unity-gain stable with a gain bandwidth
product of 6 MHz and a slew rate of 2 V/ms.
The OP470 offers excellent amplifier matching which is important
for applications such as multiple gain blocks, low noise instrumen-
tation amplifiers, quad buffers, and low noise active filters.
The OP470 conforms to the industry standard 14-pin DIP pinout.
It is pin compatible with the LM148/149, HA4741, HA5104,
and RM4156 quad op amps and can be used to upgrade systems
using these devices.
For higher speed applications, the OP471, with a slew rate of
8 V/ms, is recommended.
PIN CONNECTIONS
14–Lead Hermetic Dip
(Y–Suffix)
14–Lead Plastic Dip
(P–Suffix)
OUT A 1
–IN A 2
+IN A 3
V+ 4
+IN B 5
–IN B 6
OUT B 7
OP470
14 OUT D
13 –IN D
12 +IN D
11 V–
10 +IN C
9 –IN C
8 OUT C
16–Lead SOIC Package
(R–Suffix)
OUT A 1
–IN A 2
+IN A 3
V+ 4
+IN B 5
–IN B 6
OUT B 7
NC 8
OP470
16 OUT D
15 –IN D
14 +IN D
13 V–
12 +IN C
11 –IN C
10 OUT C
9 NC
NC = NO CONNECT
SIMPLIFIED SCHEMATIC
V+
BIAS
–IN +IN
V–
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2002

1 page




OP470 pdf
ABSOLUTE MAXIMUM RATINGS1
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 18 V
Differential Input Voltage2 . . . . . . . . . . . . . . . . . . . . . . ± 1.0 V
Differential Input Current2 . . . . . . . . . . . . . . . . . . . . ± 25 mA
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . Supply Voltage
Output Short-Circuit Duration . . . . . . . . . . . . . . . Continuous
Storage Temperature Range
P, Y Package . . . . . . . . . . . . . . . . . . . . . . –65C to +150C
Lead Temperature Range (Soldering 60 sec) . . . . . . . . . 300C
Junction Temperature (Tj) . . . . . . . . . . . . . –65C to +150C
Operating Temperature Range
OP470A . . . . . . . . . . . . . . . . . . . . . . . . . –55C to +125C
OP470E, OP470F . . . . . . . . . . . . . . . . . . . –25C to +85C
OP470G . . . . . . . . . . . . . . . . . . . . . . . . . . –40C to +85C
ORDERING GUIDE
TA = 25C
VOS MAX
(V)
Package Options
Cerdip
14-Pin
Plastic
Operating
Temperature
Range
400
400
400
800
1000
1000
OP470AY*
OP470EY
OP470FY*
OP470GP
OP470GS
MIL
MIL
IND
IND
XIND
XIND
*Not for new design; obsolete April 2002.
For military processed devices, please refer to the standard
Microcircuit Drawing (SMD) available at
www.dscc.dla.mil/programs/milspec/default.asp
SMD Part Number
59628856501CA
596288565012A
596288565013A*
*Not for new designs; obsolete April 2002.
ADI Equivalent
OP470AYMDA
OP470ARCMDA
OP470ATCMDA
OP470
Package Type
jA3 jc Unit
14-Lead Hermetic DIP(Y) 94
10 C/W
14-Lead Plastic DiP(P) 76
33 C/W
16-Lead SOL (S)
88
23 C/W
NOTES
1Absolute Maximum Ratings apply to both DICE and packaged parts, unless
otherwise noted.
2The OP470’s inputs are protected by back-to-back diodes. Current limiting
resistors are not used in order to achieve low noise performance. If differential
voltage exceeds ± 1.0 V, the input current should be limited to ± 25 mA.
3jA is specified for worst case mounting conditions, i.e., jA is specified for device
in socket for TO, CerDIP, PDIP, packages; jA is specified for device soldered to
printed circuit board for SO packages.
+IN B V+ +IN A
–IN B
–IN A
OUT B
OUT A
OUT C
–IN C +IN C V– +IN D
DIE SIZE 0.163 ؋ 0.106 INCH, 17,278 SQ. mm
(4.14 ؋ 2.69 mm, 11.14 SQ. mm)
Figure 1. Dice Characteristics
OUT D
–IN D
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the OP470 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. A
–5–

5 Page





OP470 arduino
OP470
4. The test time to measure 0.1 Hz to 10 Hz noise should not ex-
ceed 10 seconds. As shown in the noise-tester frequency-response
curve of Figure 8, the 0.1 Hz corner is defined by only one pole.
The test time of 10 seconds acts as an additional pole to elimi-
nate noise contribution from the frequency band below 0.1 Hz.
5. A noise-voltage-density test is recommended when measuring
noise on a large number of units. A 10 Hz noise voltage-density
measurement will correlate well with a 0.1 Hz to 10 Hz
peak-to-peak noise reading, since both results are determined
by the white noise and the location of the 1/f corner frequency.
6. Power should be supplied to the test circuit by well bypassed
low noise supplies, e.g. batteries. These will minimize output
noise introduced via the amplifier supply pins.
100
80
60
40
20
0
0.01
0.1 1 10
FREQUENCY – Hz
100
Figure 8. 0.1 Hz to 10 Hz Peak-to-Peak Voltage Noise Test
Circuit Frequency Response
NOISE MEASUREMENT—NOISE VOLTAGE DENSITY
The circuit of Figure 9 shows a quick and reliable method of
measuring the noise voltage density of quad op amps. Each
individual amplifier is series-connected and is in unity-gain, save
the final amplifier which is in a noninverting gain of 101. Since
the ac noise voltages of each amplifier are uncorrelated, they
add in rms fashion to yield:
eOUT
=
101
Ê
Ë
enA 2
+
e
2
nB
+
e
2
nC
+
e nD 2
ˆ
¯
The OP470 is a monolithic device with four identical amplifiers.
The noise voltage density of each individual amplifier will match,
giving:
( )eOUT
= 101
Ê
Ë
4en
2
ˆ
¯
= 101 2en
NOISE MEASUREMENT—CURRENT NOISE DENSITY
The test circuit shown in Figure 10 can be used to measure
current noise density. The formula relating the voltage output to
current noise density is:
where:
( )in =
ÊËÁ
nOUT
G
ˆ¯˜ 2
-
40nV/
2
Hz
RS
G = gain of 10000
RS = 100 kW source resistance
R3
1.24k
R1 R2
5100k
OP470
DUT
OP27E
R5
8.06k
en OUT TO
SPECTRUM ANALYZER
R4
200
GAIN = 50,000
VS = ؎5V
Figure 10. Current Noise Density Test Circuit
R1
100
R2
10k
1/4
OP470
1/4
OP470
1/4
OP470
1/4
OP470
eOUT
TO SPECTRUM ANALYZER
eOUT (nV Hz) = 101(2en)
VS = ؎15V
Figure 9. Noise Voltage Density Test Circuit
REV. A
–11–

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