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PDF OP283 Data sheet ( Hoja de datos )

Número de pieza OP283
Descripción 5 MHz Single-Supply Operational Amplifiers
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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a
FEATURES
Single-Supply – +3 Volts to +36 Volts
Wide Bandwidth – 5 MHz
Low Offset Voltage – <1 mV
High Slew Rate – 10 V/s
Low Noise – 10 nV/Hz
Unity-Gain Stable
Input and Output Range Includes GND
No Phase Reversal
APPLICATIONS
Multimedia
Telecom
ADC Buffers
Wide Band Filters
Microphone Preamplifiers
GENERAL DESCRIPTION
The OP183 is a single-supply, 5 MHz bandwidth amplifier with
slew rates of 10 V/µs. The OP283 is a dual version. Both can
operate from voltages as low as 3 volts and up to 36 volts. This
combination of slew rate and bandwidth yields excellent single-
supply ac performance making them ideally suited for telecom and
multimedia audio applications.
In addition to its ac characteristics, the OP183 family provides
good dc performance with guaranteed 1 mV offset. Noise is a
respectable 10 nV/Hz. Supply current is only 1.2 mA per amplifier.
These amplifiers are well suited for single-supply applications that
require moderate bandwidths even when used in high gain configu-
rations. This makes them useful in filters and instrumentation.
Their output drive capability and very wide full power bandwidth
make them a good choice for multimedia headphone drivers or
microphone input amplifiers.
The OP183 and OP283 are available in 8-pin plastic DIP and SO-8
surface mount packages. They are specified over the extended
industrial (–40°C to +85°C) temperature range.
5 MHz Single-Supply
Operational Amplifiers
OP183/OP283
PIN CONNECTIONS
8-Lead Narrow-Body SO
(S Suffix)
8-Lead Epoxy DIP
(P Suffix)
18
2 OP183 7
3 TOP VIEW 6
(Not to Scale)
45
NULL 1
–IN 2
+IN 3
V– 4
OP183
8 NC
7 V+
6 OUT
5 NULL
NC = NO CONNECT
8-Lead Narrow-Body SO
(S Suffix)
8-Lead Epoxy DIP
(P Suffix)
18
2 OP283 7
3 TOP VIEW 6
(Not to Scale)
45
OUTA 1
–INA 2
+INA 3
V– 4
OP283
8 V+
7 OUTB
6 –INB
5 +INB
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood. MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703

1 page




OP283 pdf
80
VS = +5V
70 300X
OP AMPS
60
50
40
30
20
10
0
–600 –400 –200
0 +200 +400 +600
INPUT OFFSET VOLTAGE – µV
Figure 1. OP183 Input Offset Voltage
Distribution @ +5 V
Typical Characteristics–OP183/OP283
80
VS = ±15V
70 300X
OP AMPS
60
50
40
30
20
10
0
–600 –400 –200
0 +200 +400 +600
INPUT OFFSET VOLTAGE – µV
Figure 2. OP183 Input Offset Voltage
Distribution @ ±15 V
160
VS = +5V
140 590X
OP AMPS
120
100
80
60
40
20
0
–600 –400 –200
0 +200 +400 +600
INPUT OFFSET VOLTAGE – µV
Figure 3. OP283 Input Offset Voltage
Distribution @ +5 V
160
VS = ±15V
140 590X
OP AMPS
120
100
80
60
40
20
0
–600 –400 –200
0 +200 +400 +600
INPUT OFFSET VOLTAGE – µV
Figure 4. OP283 Input Offset Voltage
Distribution @ ±15 V
160
–40°C TA +85°C
140 300X OP AMPS
PLASTIC PACKAGE
120
100
80
60
40
20
0
0 2 4 6 8 10 12
TCVOS – µV/°C
Figure 5. OP183 Input Offset Voltage
Drift (TCVOS) Distribution @ +5 V
160
–40°C TA +85°C
140 300X OP AMPS
PLASTIC PACKAGE
120
100
80
60
40
20
0
0 2 4 6 8 10 12
TCVOS – µV/°C
Figure 6. OP183 Input Offset Voltage
Drift
(TCV )
OS
Distribution
@
±15
V
200
180 –40°C TA +85°C
590X OP AMPS
160 PLASTIC PACKAGE
140
120
100
80
60
40
20
0
0 2 4 6 8 10 12 14 16
TCVOS – µV/°C
Figure 7. OP283 Input Offset Voltage
Drift (TCVOS) Distribution @ +5 V
200
180 –40°C TA +85°C
590X OP AMPS
160 PLASTIC PACKAGE
140
120
100
80
60
40
20
0
0 2 4 6 8 10 12 14 16
TCVOS – µV/°C
Figure 8. OP283 Input Offset Voltage
Drift (TCVOS) Distribution @ ±15 V
3
2
1
TA = +25°C
RL = 2k
VS = +3V
0
1k
10k 100k
1M
FREQUENCY – Hz
10M
Figure 9. OP183/OP283 Maximum
Output Swing vs. Frequency @ +3 V
REV.B
–5–

5 Page





OP283 arduino
OP183/OP283
7
QB9
RB3
QB10
RB4
RB5
RB6
QB6
QB7
Q7 Q8
QB8
R1 R2
2 Q1
Q2 3
JB1
Z1
QB5A
QB4
BA
QB2
RB2
RB1
QB3
QB1
CB1
1
R10
R3A
CC1
R4A
R3LT
R3AT
R3B
R4B
5
R11
R4AT
R4LT
QD1
Q3
QB12
Q6
Q5
CC3
Q4 CF1
R5
QB13
QB14
Figure 43. OP183 Simplified Schematic
QB11
R9
QD2
CC2
R8
Q12
6
QD3
CO
R7
Q10
Q11
4
* OP283 SPICE Macro-model
Rev. A, 9/93
* JCB/ADI
*
* Copyright 1993 by Analog Devices
*
* Refer to “README.DOC” file for License Statement.
* Use of this model indicates your acceptance of the terms and
* provisions in the License Statement.
*
* Node assignments
* noninverting input
* | inverting input
* | | positive supply
* | | | negative supply
* | | | | output
* ||| | |
.SUBCKT OP283 2 1 99 50 45
*
* INPUT STAGE AND POLE AT 600 kHz
*
I1
99 8
1E-4
Q1 4 1 6
QP
Q2 5 3 7
QP
CIN 1 2 1.5PF
R1
50 4
1591
R2
50 5
1591
C1 4 5 83.4E-12
R3 6 8 1075
R4 7 8 1075
IOS 1 2 12.5E-9
EOS 3 2 POLY(1) (15,98) 25E-6 1
DC1
2
36 DZ
DC2
1
36 DZ
*
* GAIN STAGE AND DOMINANT POLE AT 10 Hz
*
EREF 98 0
POLY(2) (99,0) (50,0) 0 0.5 0.5
G1
98 9
(4,5) 6.28E-4
R5 9 98 1.59E9
C2 9 98 10E-12
D1 9 10 DX
D2
11 9
DX
E1 10 98 POLY(1) 99 98 -1.35 1.03
V2 50 11 –0.63
*
* COMMON MODE STAGE WITH ZERO AT 353 Hz
*
ECM 14 98 POLY(2) (1,98) (2,98) 0 3.5 3.5
R7 14 15 1E6
C4 14 15 3.75E-11
R8 15 98 1
*
*POLE AT 20 MHz
*
GP2 98 31 (9,98) 1E-6
RP2 31 98 1E6
CP2 31 98 7.96E-15
*
*ZERO AT 1.5 MHz
*
EZ1 32 98 (31,98) 1E6
RZ1 32 33 1E6
RZ2 33 98 1
CZ1 32 33 106E-15
*
*POLE AT 10 MHz
*
GP10 98 40 (33,98) 1E-6
RP10 40 98 1E6
CP10 40 98 15.9E-15
*
* OUTPUT STAGE
*
RO1
99 45
140
REV.B
–11–

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