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PDF OM62112 Data sheet ( Hoja de datos )
| Número de pieza | OM62112 | |
| Descripción | 48 X 84 dot matrix LCD driver | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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INTEGRATED CIRCUITS
DATA SHEET
OM6211
48 × 84 dot matrix LCD driver
Product specification
File under Integrated Circuits, IC12
2002 Jan 17
1 page  
Philips Semiconductors
48 × 84 dot matrix LCD driver
Product specification
OM6211
6 PINNING
SYMBOL
VOS4
PAD
3
VOS3
4
VOS2
5
VOS1
6
VOS0
7
T6
RES
8 to 11
16
T5
T4
T3
T2
T1
SCE
17
18
19
20
21
22
VSS2
VSS1
OSC
SDOUT
23 to 30
31 to 38
40
41
DESCRIPTION
input pin 4 for VLCD
calibration
input pin 3 for VLCD
calibration
input pin 2 for VLCD
calibration
input pin 1 for VLCD
calibration
input pin 0 for VLCD
calibration
test input 6
external reset input
(active LOW)
test input 5
test input 4
test output 3
test output 2
test output 1
chip enable input
(active LOW)
ground
ground
oscillator input
serial data output
SYMBOL
SDIN
SCLK
ID4
ID3
MX
VDD1
VDD2
VDD3
VLCDSENSE
VLCDOUT
VLCDIN
ROW 0 to
ROW 23
COL 0 to
COL 83
ROW 47 to
ROW 24
PAD
42
43
44
45
46
47 to 52
53 to 60
61 to 64
65
66 to 72
73 to 78
89 to 112
DESCRIPTION
serial data input
serial clock input
module identification input
module identification input
horizontal mirroring input
logic supply voltage
voltage multiplier supply
voltage
voltage multiplier supply
voltage
VLCD generator regulation
input
VLCD generator output
LCD supply voltage input
LCD row driver outputs
113 to 196 LCD column driver outputs
197 to 220 LCD row driver outputs
1, 12 to 15,
39, 79,
81 to 88
and
221 to 225
dummy pads
7 PIN FUNCTIONS
7.1 ROW 0 to ROW 47 row driver outputs
These pads output the display row signals.
7.2 COL 0 to COL 83 column driver outputs
These pads output the display column signals.
7.3 VSS1 and VSS2: negative power supply rails
Negative power supply rails VSS1 and VSS2 must be
connected together, hereafter referred to as VSS. When a
pin has to be connected externally to VSS, then pin VSS1
should be used.
7.4 VDD1 to VDD3: positive power supply rails
Positive power supply rails: VDD1 for logic supply, VDD2 and
VDD3 for voltage multiplier. VDD2 and VDD3 must be
connected together, hereafter referred to as VDD2.
7.5 VLCDOUT, VLCDIN and VLCDSENSE: LCD power
supply
If the internal VLCD generator is used, then all three pins
must be connected together. If not (VLCD generator is
disabled and an external voltage is applied to VLCDIN), then
VLCDOUT must be left open-circuit, VLCDSENSE must be
connected to VLCDIN, VDD2 and VDD3 should be applied
according to the specified voltage range. The following
settings are also required: HVE = 0, S1 = 1 and S0 = 0.
7.6 VOS4 to VOS0: calibration inputs
Five pull-up input pins for on-glass VLCD calibration. Each
pin may be connected to VSS, which corresponds to
logic 0, or left open-circuit, which corresponds to logic 1.
All five pins define a 5-bit two’s complement number
ranging from −16 to 15 decimal (from 10000 to 01111).
The default value, with all pins connected to VSS, is
0 decimal (00000).
2002 Jan 17
5
5 Page 
Philips Semiconductors
48 × 84 dot matrix LCD driver
Product specification
OM6211
9.11 Temperature compensation
Due to the temperature dependency of the liquid crystals viscosity, the LCD controlling voltage (VLCD) must be increased
at lower temperatures to maintain optimum contrast. Figure 4 shows VLCD as a function of temperature for a typical high
multiplex rate liquid.
In the OM6211 the temperature coefficient of VLCD can be selected from 4 values by setting bits TC1 and TC0,
see Tables 4 and 8.
handbook, full pagewidth
VLCD
MGT848
T
Fig.4 VLCD as a function of liquid crystal temperature (typical values).
9.12 VLCD generator
The binary number VOP representing the operating voltage
can be set by the serial interface command and can be
adjusted (calibrated) by 5 input pins according to the
following formula:
VOP = VPR + VOS
(1)
where:
• VPR is an 8-bit unsigned number set by the serial
interface command
• VOS is a 5-bit two’s complement number set by the
5 input pins VOS4 to VOS0, see Table 9
• VOP is an 8-bit unsigned number used internally for
generation of the LCD supply voltage VLCD.
To avoid numerical overflow the allowed values of VPR
should be limited to the range 32 to 225 (decimal).
The corresponding voltage at the reference temperature,
Tnom, can be calculated as follows:
VLCD(Tnom) = (a + VOP × b)
(2)
The generated voltage at VLCD is dependent on the
temperature, programmed Temperature Coefficient (TC)
and the programmed voltage at the reference temperature
(Tnom).
VLCD = (a + VOP × b) × [1 + TC × (T – Tnom)]
(3)
Tnom, a and b for each temperature coefficient are given in
Table 4. The maximum voltage that can be generated is
dependent on the voltage of VDD2 and the display load
current.
As the programming range for the internally generated
VLCD allows values above the maximum allowed VLCD, the
user has to ensure while setting the VPR register and
selecting the Temperature Compensation, that under all
conditions and including all tolerances the VLCD limit of
maximum 9 V will never be exceeded.
For a particular liquid crystal, the optimum value of VLCD
can be calculated for a given multiplex rate. For a Mux rate
of 1 : 48, the optimum operating voltage of the liquid
crystal can be calculated as follows;
VLCD
=
----------1-----+---------4---8------------
2 × 1 – ----1-4---8--
×
Vth
=
6.06 × Vth
(4)
where Vth is the threshold voltage of the liquid crystal used.
2002 Jan 17
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet OM62112.PDF ] | |
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