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Número de pieza | OM4068U | |
Descripción | LCD driver for low multiplex rates | |
Fabricantes | NXP Semiconductors | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de OM4068U (archivo pdf) en la parte inferior de esta página. Total 28 Páginas | ||
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DATA SHEET
OM4068
LCD driver for low multiplex rates
Product specification
File under Integrated Circuits, IC12
1998 Jun 18
1 page Philips Semiconductors
LCD driver for low multiplex rates
Product specification
OM4068
SYMBOL
PIN
QFP44
DIP40
DESCRIPTION
SEG27
SEG28
SEG29
SEG30
SEG31
SEG32
42 13 LCD segment driver output 27
43 14 LCD segment driver output 28
44 15 LCD segment driver output 29
1 16 LCD segment driver output 30
2 17 LCD segment driver output 31
3 18 LCD segment driver output 32
Notes
1. SEG1 to SEG32 (LCD segment driver outputs) output the multi-level signals for the LCD segments.
2. BP0, BP1 and BP2 (LCD backplane driver outputs) output the multi-level signals for the LCD backplanes.
3. VLCD (LCD power supply): power supply for the LCD.
4. SDIN (serial data line): input for the bus data line.
5. SCL (serial clock line): input for the bus clock line.
6. SDOUT (serial data output): output of the shift register to allow serial cascading of the OM4068 with other devices.
7. SCE (serial clock enable): input for enable/disable acquisition on the data input line. If disabled, data on the serial
bus are not accepted by the device.
8. M0 and M1 (display mode select inputs): inputs to select the LCD drive configurations; static, duplex or triplex.
1998 Jun 18
5
5 Page Philips Semiconductors
LCD driver for low multiplex rates
Product specification
OM4068
1 : 2 MULTIPLEX DRIVE MODE
When two backplanes are provided in the LCD, the 1 : 2 multiplex mode applies, as shown in Fig.6.
BP1
BP2
SEG N
VLCD
1/2VLCD
VSS
VLCD
1/2VLCD
VSS
VLCD
1/2VLCD
VSS
SEG N + 1
VLCD
1/2VLCD
VSS
SEG N + 2
VLCD
1/2VLCD
VSS
SEG N + 3
VLCD
1/2VLCD
VSS
Tframe
VLCD
1/2VLCD
0V
−1/2VLCD
−VLCD
VLCD
1/2VLCD
0V
−1/2VLCD
−VLCD
VLCD
1/2VLCD
0V
−1/2VLCD
−VLCD
VLCD
1/2VLCD
0V
−1/2VLCD
−VLCD
SEG - BP1
Tframe
VLCD
1/2VLCD
0V
−1/2VLCD
−VLCD
VLCD
1/2VLCD
0V
−1/2VLCD
−VLCD
VLCD
1/2VLCD
0V
−1/2VLCD
−VLCD
VLCD
1/2VLCD
0V
−1/2VLCD
−VLCD
MBK820
SEG - BP2
Tframe
BACKPLANE
DRIVER OUTPUTS
BP1
BP2
SEG N
off
off
SEGMENTS
SEG N + 1 SEG N + 2 SEG N + 3
on off on
off on on
Fig.6 Waveforms for 1 : 2 multiplex drive mode (VOP = VLCD − VSS).
1 : 3 MULTIPLEX DRIVE MODE
When three backplanes are provided in the LCD, the 1 : 3 multiplex mode applies, as shown in Fig.7.
1998 Jun 18
11
11 Page |
Páginas | Total 28 Páginas | |
PDF Descargar | [ Datasheet OM4068U.PDF ] |
Número de pieza | Descripción | Fabricantes |
OM4068 | LCD driver for low multiplex rates | NXP Semiconductors |
OM4068H | LCD driver for low multiplex rates | NXP Semiconductors |
OM4068P | LCD driver for low multiplex rates | NXP Semiconductors |
OM4068U | LCD driver for low multiplex rates | NXP Semiconductors |
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