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PDF NDT455N Data sheet ( Hoja de datos )

Número de pieza NDT455N
Descripción N-Channel Enhancement Mode Field Effect Transistor
Fabricantes Fairchild 
Logotipo Fairchild Logotipo



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July 1996
NDT455N
N-Channel Enhancement Mode Field Effect Transistor
General Description
These N-Channel logic level enhancement mode power field
effect transistors are produced using Fairchild's proprietary, high
cell density, DMOS technology. This very high density process
is especially tailored to minimize on-state resistance, provide
superior switching performance, and withstand high energy
pulses in the avalanche and commutation modes. These devices
are particularly suited for low voltage applications such as DC
motor control and DC/DC conversion where fast switching, low
in-line power loss, and resistance to transients are needed.
Features
11.5 A, 30 V. RDS(ON) = 0.015 @ VGS = 10 V
RDS(ON) = 0.02 @ VGS = 4.5 V.
High density cell design for extremely low RDS(ON).
High power and current handling capability in a widely used
surface mount package.
________________________________________________________________________________
D
GD S
Absolute Maximum Ratings TA = 25°C unless otherwise noted
Symbol Parameter
VDSS Drain-Source Voltage
VGSS Gate-Source Voltage
ID Drain Current - Continuous
- Pulsed
(Note 1a)
PD Maximum Power Dissipation
(Note 1a)
(Note 1b)
(Note 1c)
TJ,TSTG Operating and Storage Temperature Range
THERMAL CHARACTERISTICS
RθJA
RθJC
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
© 1997 Fairchild Semiconductor Corporation
D
GS
NDT455N
30
20
± 11.5
± 40
3
1.3
1.1
-65 to 150
42
12
Units
V
V
A
W
°C
°C/W
°C/W
NDT455N Rev.F

1 page




NDT455N pdf
Typical Electrical Characteristics
1.1
1.08
I D = 250µA
1.06
1.04
1.02
1
0.98
0.96
0.94
-50
-25
0
25 50 75 100 125 150
T , JUNCTION TEMPERATURE (°C)
J
Figure 7. Breakdown Voltage Variation with
Temperature.
40
10 VGS = 0V
1
0.1
0.01
TJ = 125°C
25°C
-55°C
0.001
0.0001
0
0.2 0.4 0.6 0.8 1 1.2
VSD , BODY DIODE FORWARD VOLTAGE (V)
1.4
Figure 8. Body Diode Forward Voltage Variation
with Current and Temperature.
4000
2000
1000
800
500
C iss
C oss
300
f = 1 MHz
200
VGS = 0V
C rss
100
0.1
0.2
0.5 1
2
5 10
V , DRAIN TO SOURCE VOLTAGE (V)
DS
Figure 9. Capacitance Characteristics.
20 30
10
ID = 11.5A
8
6
VDS = 5.V
10V
15V
4
2
0
0 10 20 30 40
Q g , GATE CHARGE (nC)
Figure 10. Gate Charge Characteristics.
50
VIN
VG S
RGEN
G
VDD
RL
D
V OUT
DUT
S
Figure 11. Switching Test Circuit.
t d(on)
t on
tr
90%
td(off)
toff
tf
90%
VO U T
VIN
10%
10%
50%
10%
90%
INVERTED
50%
PULSE WIDTH
Figure 12. Switching Waveforms.
NDT455N Rev.F

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