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PDF NDT2955 Data sheet ( Hoja de datos )

Número de pieza NDT2955
Descripción P-Channel Enhancement Mode Field Effect Transistor
Fabricantes Fairchild 
Logotipo Fairchild Logotipo



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September 1996
NDT2955
P-Channel Enhancement Mode Field Effect Transistor
General Description
Features
Power SOT P-Channel enhancement mode power field
effect transistors are produced using Fairchild's
proprietary, high cell density, DMOS technology. This very
high density process is especially tailored to minimize
on-state resistance and provide superior switching
performance. These devices are particularly suited for low
voltage applications such as notebook computer power
management and DC motor control.
-2.5A, -60V. RDS(ON) = 0.3@ VGS = -10V.
High density cell design for extremely low RDS(ON).
High power and current handling capability in a widely used
surface mount package.
_______________________________________________________________________________________________________
DD
GD S
GS
Absolute Maximum Ratings
Symbol Parameter
TA = 25°C unless otherwise noted
VDSS Drain-Source Voltage
VGSS Gate-Source Voltage
ID Drain Current - Continuous
- Pulsed
PD Maximum Power Dissipation
(Note 1a)
(Note 1a)
(Note 1b)
(Note 1c)
TJ,TSTG Operating and Storage Temperature Range
THERMAL CHARACTERISTICS
RθJA
Thermal Resistance, Junction-to-Ambient
RθJC
Thermal Resistance, Junction-to-Case
* Order option J23Z for cropped center drain lead.
(Note 1a)
(Note 1)
© 1997 Fairchild Semiconductor Corporation
NDT2955
-60
±20
-2.5
-15
3
1.3
1.1
-65 to 150
42
12
Units
V
V
A
W
°C
°C/W
°C/W
NDT2955 Rev. B2

1 page




NDT2955 pdf
Typical Electrical Characteristics (continued)
1.15
1.1
I D = -250µA
1.05
1
0.95
0.9
-50
-25
0 25 50 75 100 125 150
TJ , JUNCTION TEMPERATURE (°C)
Figure 7. Breakdown Voltage Variation with
Temperature.
10
5 VGS = 0V
1
0.5 125°C
25°C
0.1
TJ = -55°C
0.01
0.001
-0.3
-0.6 -0.9 -1.2 -1.5 -1.8
V , BODY DIODE FORWARD VOLTAGE (V)
SD
-2.1
Figure 8. Body Diode Forward Voltage Variation
with Current and Temperature
1000
500
300
200
C iss
C oss
100
50
30
20
0.1
f = 1 MHz
VGS = 0V
C rss
0.2
0.5 1
2
5 10 20
-VDS , DRAIN TO SOURCE VOLTAGE (V)
50
Figure 9. Capacitance Characteristics.
10
IDS = -2.5A
8
6
VDS = -10V
-30V
-20V
4
2
0
0 5 10 15
Q g , GATE CHARGE (nC)
Figure 10. Gate Charge Characteristics.
20
V IN
VG S
RGEN
G
-VD D
RL
D
V OUT
DUT
S
t d(on)
ton
tr
90%
td(off)
toff
tf
90%
VO U T
VIN
10%
10%
50%
10%
90%
50%
PULSE WIDTH
INVERTED
Figure 11. Switching Test Circuit.
Figure 12. Switching Waveforms.
NDT2955 Rev. B2

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