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Número de pieza NDT014L
Descripción N-Channel Logic Level Enhancement Mode Field Effect Transistor
Fabricantes Fairchild 
Logotipo Fairchild Logotipo



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NDT014L
N-Channel Logic Level Enhancement Mode Field Effect Transistor
August 1996
General Description
These N-Channel logic level enhancement mode power field
effect transistors are produced using Fairchild's proprietary,
high cell density, DMOS technology.This very high density
process is especially tailored to minimize on-state resistance,
provide superior switching performance, and withstand high
energy pulses in the avalanche and commutation
modes.Thesedevices are particularly suited for low voltage
applications such as DC motor control and DC/DC
conversion where fast switching, low in-line power loss, and
resistance to transients are needed.
Features
2.8 A, 60 V. RDS(ON) = 0.2 @ VGS = 4.5 V
RDS(ON) = 0.16 @ VGS = 10 V.
High density cell design for extremely low RDS(ON).
High power and current handling capability in a widely used
surface mount package.
_________________________________________________________________________________
DD
GD S
Absolute Maximum Ratings TA = 25°C unless otherwise noted
Symbol Parameter
VDSS Drain-Source Voltage
VGSS Gate-Source Voltage
ID Drain Current - Continuous
- Pulsed
(Note 1a)
PD Maximum Power Dissipation
(Note 1a)
(Note 1b)
(Note 1c)
TJ,TSTG Operating and Storage Temperature Range
THERMAL CHARACTERISTICS
RθJA
RθJC
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
GS
NDT014L
60
± 20
± 2.8
± 10
3
1.3
1.1
-65 to 150
42
12
Units
V
V
A
W
°C
°C/W
°C/W
© 1997 Fairchild Semiconductor Corporation
NDT014L Rev.D

1 page




NDT014L pdf
Typical Electrical Characteristics
1.12
1.08
I D = 250µA
1.04
1
0.96
0.92
-50
-25
0 25 50 75 100 125 150
TJ , JUNCTION TEMPERATURE (°C)
Figure 7. Breakdown Voltage Variation with
Temperature.
10
VGS = 0V
1
0.1
0.01
0.001
TJ = 125°C
25°C
-55°C
0.0001
0.2
0.4 0.6 0.8
1
VSD , BODY DIODE FORWARD VOLTAGE (V)
1.2
Figure 8. Body Diode Forward Voltage Variation
with Current and Temperature.
700
500
Ciss
200
Coss
100
50
f = 1 MHz
20 VGS = 0V
Crss
10
0.1
0.2
0.5 1
2
5 10
VDS, DRAIN TO SOURCE VOLTAGE (V)
20
40 60
Figure 9. Capacitance Characteristics.
10
I D = 2.8A
8
V DS = 5V
10V
20V
6
4
2
0
0 2 4 6 8 10
Q , GATE CHARGE (nC)
g
Figure 10. Gate Charge Characteristics.
VIN
VG S
RGEN
G
VDD
RL
D
V OUT
DUT
S
Figure 11. Switching Test Circuit.
t d(on)
t on
tr
90%
td(off)
toff
tf
90%
VO U T
VIN
10%
10%
50%
10%
90%
INVERTED
50%
PULSE WIDTH
Figure 12. Switching Waveforms.
NDT014L Rev.D

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