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PDF NDS9956A Data sheet ( Hoja de datos )
| Número de pieza | NDS9956A | |
| Descripción | Dual N-Channel Enhancement Mode Field Effect Transistor | |
| Fabricantes | Fairchild | |
| Logotipo |  |
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NDS9956A
Dual N-Channel Enhancement Mode Field Effect Transistor
February 1996
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary, high
cell density, DMOS technology. This very high density
process is especially tailored to minimize on-state resistance,
provide superior switching performance, and withstand high
energy pulses in the avalanche and commutation modes.
These devices are particularly suited for low voltage
applications such as DC/DC conversion and DC motor
control where fast switching, low in-line power loss, and
resistance to transients are needed.
Features
3.7A, 30V. RDS(ON) = 0.08Ω @ VGS = 10V
High density cell design for extremely low RDS(ON).
High power and current handling capability in a widely used
surface mount package.
Dual MOSFET in surface mount package.
________________________________________________________________________________
54
63
72
81
Absolute Maximum Ratings
Symbol Parameter
TA= 25°C unless otherwise noted
VDSS Drain-Source Voltage
VGSS Gate-Source Voltage
ID Drain Current - Continuous
- Pulsed
(Note 1a)
PD Power Dissipation for Dual Operation
Power Dissipation for Single Operation
(Note 1a)
(Note 1b)
(Note 1c)
TJ,TSTG Operating and Storage Temperature Range
THERMAL CHARACTERISTICS
RθJA
RθJC
Thermal Resistance, Junction-to-Ambient (Note 1a)
Thermal Resistance, Junction-to-Case
(Note 1)
© 1997 Fairchild Semiconductor Corporation
NDS9956A
30
± 20
± 3.7
± 15
2
1.6
1
0.9
-55 to 150
78
40
Units
V
V
A
W
°C
°C/W
°C/W
NDS9956A.SAM
1 page  
Typical Electrical Characteristics
1.12
I D = 250µA
1.08
1.04
1
0.96
0.92
-50
-25
0
25 50 75 100 125 150
TJ , JUNCTION TEMPERATURE (°C)
Figure 7. Breakdown Voltage Variation with
Temperature.
10
5 V GS = 0V
1
0.5 TJ = 125°C
0.1
25°C
-55°C
0.01
0.001
0.2
0.4 0.6 0.8 1 1.2
VSD , BODY DIODE FORWARD VOLTAGE (V)
1.4
Figure 8. Body Diode Forward Voltage Variation
with Current and Temperature.
1000
800
500
300
200
C iss
C oss
100 f = 1 MHz
V GS = 0V
50
0.1
0.2
0.5 1
2
5 10
VDS , DRAIN TO SOURCE VOLTAGE (V)
Figure 9. Capacitance Characteristics.
C rss
30
10
ID = 3.7A
8
6
VDS = 10V
20V
15V
4
2
0
0 2 4 6 8 10
Q g , GATE CHARGE (nC)
Figure 10. Gate Charge Characteristics.
12
10
V DS=10V
8
6
TJ= -55°C
25°C
125°C
4
2
0
0 2 4 6 8 10
I D , DRAIN CURRENT (A)
Figure 11. Transconductance Variation with Drain
Current and Temperature.
NDS9956A.SAM
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