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PDF NDS9948 Data sheet ( Hoja de datos )

Número de pieza NDS9948
Descripción Dual P-Channel Enhancement Mode Field Effect Transistor
Fabricantes Fairchild 
Logotipo Fairchild Logotipo



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February 1996
NDS9948
Dual P-Channel Enhancement Mode Field Effect Transistor
General Description
Features
These P-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary, high cell
-2.3A, -60V. RDS(ON) = 0.25@ VGS = -10V.
density, DMOS technology. This very high density process has
been especially tailored to minimize on-state resistance, provide
superior switching performance, and withstand high energy
pulses in the avalanche and commutation modes. These
High density cell design for low RDS(ON).
High power and current handling capability in a widely
used surface mount package.
devices are particularly suited for low voltage applications such
as notebook computer power management and other battery
Dual MOSFET in surface mount package.
powered circuits where fast switching, low in-line power loss,
and resistance to transients are needed.
______________________________________________________________________________
5
6
7
8
Absolute Maximum Ratings
Symbol Parameter
TA = 25°C unless otherwise noted
VDSS Drain-Source Voltage
VGSS Gate-Source Voltage
ID
Drain Current
- Continuous TA = 25°C (Note 1a)
- Pulsed
TA = 25°C
- Continuous TA = 70°C (Note 1a)
PD Power Dissipation for Dual Operation
Power Dissipation for Single Operation
(Note 1a)
(Note 1b)
TJ,TSTG Operating and Storage Temperature Range
THERMAL CHARACTERISTICS
(Note 1c)
RθJA
RθJC
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
NDS9948
-60
± 20
± 2.3
± 10
± 1.8
2
1.6
1
0.9
-55 to 150
78
40
© 1997 Fairchild Semiconductor Corporation
4
3
2
1
Units
V
V
A
W
°C
°C/W
°C/W
NDS9948.SAM

1 page




NDS9948 pdf
Typical Electrical Characteristics (continued)
1.15
1.1
I D = -250µA
1.05
1
0.95
0.9
-50
-25
0 25 50 75 100 125 150
TJ , JUNCTION TEMPERATURE (°C)
Figure 7. Breakdown Voltage Variation with
Temperature.
10
5 VGS = 0V
1
0.5 125°C
25°C
0.1
TJ = -55°C
0.01
0.001
-0.3
-0.6 -0.9 -1.2 -1.5 -1.8
VSD , BODY DIODE FORWARD VOLTAGE (V)
-2.1
Figure 8. Body Diode Forward Voltage Variation
with Current and Temperature.
1000
500
300
200
C iss
C oss
100
50
30
20
0.1
f = 1 MHz
VGS = 0V
C rss
0.2
0.5 1
2
5 10 20
-VDS , DRAIN TO SOURCE VOLTAGE (V)
50
Figure 9. Capacitance Characteristics.
10
IDS = -2.3A
8
6
VDS = -10V
-30V
-20V
4
2
0
0 5 10 15
Q g , GATE CHARGE (nC)
Figure 10. Gate Charge Characteristics.
20
V IN
VG S
RGEN
G
-VD D
RL
D
V OUT
DUT
S
Figure 11. Switching Test Circui.t
t d(on)
t on
tr
90%
td(off)
toff
tf
90%
VOUT
10%
10%
90%
VIN 50%
50%
10%
PULSE WIDTH
Figure 12. Switching Waveforms.
INVERTED
NDS9948.SAM

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