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PDF NDS8934 Data sheet ( Hoja de datos )

Número de pieza NDS8934
Descripción Dual P-Channel Enhancement Mode Field Effect Transistor
Fabricantes Fairchild 
Logotipo Fairchild Logotipo



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No Preview Available ! NDS8934 Hoja de datos, Descripción, Manual

March 1996
NDS8934
Dual P-Channel Enhancement Mode Field Effect Transistor
General Description
These P-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary,
high cell density, DMOS technology. This very high
density process is especially tailored to minimize on-state
resistance, provide superior switching performance, and
withstand high energy pulses in the avalanche and
commutation modes. These devices are particularly
suited for low voltage applications such as notebook
computer power management and other battery powered
circuits where fast switching, low in-line power loss, and
resistance to transients are needed.
Features
-3.8A, -20V. RDS(ON) = 0.07@ VGS = -4.5V
RDS(ON) = 0.1@ VGS = -2.7V.
High density cell design for extremely low RDS(ON).
High power and current handling capability in a widely used
surface mount package.
Dual MOSFET in surface mount package.
_________________________________________________________________________________
54
63
72
81
Absolute Maximum Ratings TA = 25°C unless otherwise noted
Symbol Parameter
VDSS Drain-Source Voltage
VGSS Gate-Source Voltage
ID Drain Current - Continuous
- Pulsed
(Note 1a)
PD Power Dissipation for Dual Operation
Power Dissipation for Single Operation
(Note 1a)
(Note 1b)
TJ,TSTG Operating and Storage Temperature Range
THERMAL CHARACTERISTICS
(Note 1c)
RθJA
RθJC
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
© 1997 Fairchild Semiconductor Corporation
NDS8934
-20
-8
-3.8
-15
2
1.6
1
0.9
-55 to 150
78
40
Units
V
V
A
W
°C
°C/W
°C/W
NDS8934.SAM

1 page




NDS8934 pdf
Typical Electrical Characteristics
1.1
I D = -250µA
1.08
1.06
1.04
1.02
1
0.98
0.96
0.94
-50
-25
0
25 50 75 100 125 150
T J , JUNCTION TEMPERATURE (°C)
Figure 7. Breakdown Voltage Variation with
Temperature.
20
10
VGS = 0V
2
1
TJ = 125°C
0.1
25°C
-55°C
0.01
0.001
0.0001
0
0.2 0.4 0.6 0.8 1 1.2 1.4
-VSD , BODY DIODE FORWARD VOLTAGE (V)
1.6
Figure 8. Body Diode Forward Voltage Variation
with Current and Temperature.
2000
1500
1000
800
600
400
C iss
C oss
200 f = 1 MHz
VGS = 0V
C rss
100
0.1
0.2
0.5 1
23
5
10
-VDS , DRAIN TO SOURCE VOLTAGE (V)
Figure 9. Capacitance Characteristics.
20
5
I D = -3.8A
4
VDS = -5.0V -10V
-15V
3
2
1
0
0 5 10 15 20
Q g , GATE CHARGE (nC)
Figure 10. Gate Charge Characteristics.
25
20
VDS = -10V
15
10
TJ = -55°C
25°C
125°C
5
0
0 -4 -8 -12 -16 -20
ID , DRAIN CURRENT (A)
Figure 11. Transconductance Variation with Drain
Current and Temperature.
NDS8934.SAM

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