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PDF NDS8434A Data sheet ( Hoja de datos )

Número de pieza NDS8434A
Descripción Single P-Channel Enhancement Mode Field Effect Transistor
Fabricantes Fairchild 
Logotipo Fairchild Logotipo



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March 1997
NDS8434A
Single P-Channel Enhancement Mode Field Effect Transistor
General Description
SO-8 P-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary, high cell
density, DMOS technology. This very high density process is
especially tailored to minimize on-state resistance and provide
superior switching performance. These devices are particularly
suited for low voltage applications such as notebook computer
power management and other battery powered circuits where
fast switching, low in-line power loss, and resistance to
transients are needed.
Features
-7.8 A, -20 V. RDS(ON) = 0.024 @ VGS = -4.5 V
RDS(ON) = 0.032 @ VGS = -2.5V.
High density cell design for extremely low RDS(ON).
High power and current handling capability in a widely used
surface mount package.
___________________________________________________________________________________________
54
63
72
81
Absolute Maximum Ratings TA = 25°C unless otherwise noted
Symbol Parameter
VDSS Drain-Source Voltage
VGSS Gate-Source Voltage
ID Drain Current - Continuous
- Pulsed
(Note 1a)
PD Maximum Power Dissipation
(Note 1a)
(Note 1b)
(Note 1c)
TJ,TSTG Operating and Storage Temperature Range
THERMAL CHARACTERISTICS
RθJA Thermal Resistance, Junction-to-Ambient (Note 1a)
RθJC Thermal Resistance, Junction-to-Case (Note 1)
© 1997 Fairchild Semiconductor Corporation
NDS8434A
-20
±8
-7.8
-25
2.5
1.2
1
-55 to 150
50
25
Units
V
V
A
W
°C
°C/W
°C/W
NDS8434A Rev.D

1 page




NDS8434A pdf
Typical Electrical Characteristics (continued)
1.075
ID = -250µA
1.05
1.025
1
0.975
0.95
-50 -25 0 25 50 75 100 125 150
T J , JUNCTION TEMPERATURE (°C)
Figure 7. Breakdown Voltage
Variation with Temperature.
20
10 VGS = 0V
1
0.1
0.01
TJ = 125°C
25°C
-55°C
0.001
0.0001
0
0.2 0.4 0.6 0.8
1
-VSD , BODY DIODE FORWARD VOLTAGE (V)
1.2
Figure 8. Body Diode Forward Voltage Variation with
Source Current and Temperature.
6000
4000
3000
2000
1000
Ciss
Coss
500
f = 1 MHz
VGS = 0 V
Crss
150
0 .1
0 .2
0 .5 1
2
5 10
-VDS , DRAIN TO SOURCE VOLTAGE (V)
Figure 9. Capacitance Characteristics.
20
5
I D = -7.9A
4
3
VDS = -5V
-15V
-10V
2
1
0
0 10 20 30
Qg , GATE CHARGE (nC)
Figure 10. Gate Charge Characteristics.
40
VIN
VG S
RGEN
G
-VD D
RL
D
VOUT
DUT
S
t d(on)
ton
tr
90%
td(off)
toff
tf
90%
VO U T
VIN
10%
10%
50%
10%
90%
50%
PULSE WIDTH
INVERTED
Figure 11. Switching Test Circuit.
Figure 12. Switching Waveforms.
NDS8434A Rev.D

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