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PDF NDS356P Data sheet ( Hoja de datos )
| Número de pieza | NDS356P | |
| Descripción | P-Channel Logic Level Enhancement Mode Field Effect Transistor | |
| Fabricantes | Fairchild | |
| Logotipo |  |
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March 1996
NDS356P
P-Channel Logic Level Enhancement Mode Field Effect Transistor
General Description
These P-Channel logic level enhancement mode power
field effect transistors are produced using Fairchild's
proprietary, high cell density, DMOS technology. This
very high density process is especially tailored to
minimize on-state resistance. These devices are
particularly suited for low voltage applications such as
notebook computer power management, portable
electronics, and other battery powered circuits where
fast high-side switching, and low in-line power loss are
needed in a very small outline surface mount package.
Features
-1.1 A, -20V. RDS(ON) = 0.3Ω @ VGS = -4.5V.
Proprietary package design using copper lead frame for
superior thermal and electrical capabilities.
High density cell design for extremely low RDS(ON).
Exceptional on-resistance and maximum DC current
capability.
Compact industry standard SOT-23 surface mount
package.
_______________________________________________________________________________
D
GS
Absolute Maximum Ratings
Symbol Parameter
TA = 25°C unless otherwise noted
VDSS
VGSS
ID
PD
Drain-Source Voltage
Gate-Source Voltage - Continuous
Maximum Drain Current
- Continuous
- Pulsed
Maximum Power Dissipation
(Note 1a)
(Note 1a)
(Note 1b)
TJ,TSTG Operating and Storage Temperature Range
THERMAL CHARACTERISTICS
RθJA
Thermal Resistance, Junction-to-Ambient
RθJC
Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
NDS356P
-20
± 12
±1.1
±10
0.5
0.46
-55 to 150
250
75
© 1997 Fairchild Semiconductor Corporation
Units
V
V
A
W
°C
°C/W
°C/W
NDS356P Rev. E1
1 page  
Typical Electrical Characteristics (continued)
1.08
1.06
ID = -250µA
1.04
1.02
1
0.98
0.96
-50 -25 0 25 50 75 100 125 150
T J , JUNCTION TEMPERATURE (°C)
Figure 7. Breakdown Voltage Variation with
Temperature
10
V GS = 0V
2
1 TJ = 125°C
0.5
0.2
0.1
25°C
-55°C
0.01
0.001
-0.3
-0.6 -0.9 -1.2 -1.5
VSD , BODY DIODE FORWARD VOLTAGE (V)
-1.8
Figure 8. Body Diode Forward Voltage Variation with
Source Current and Temperature
700
500
300
200
100
50
30
0.1
Ciss
Coss
f = 1 MHz
VGS = 0 V
Crss
0.2
0.5 1
2
5 10
-V , DRAIN TO SOURCE VOLTAGE (V)
DS
20
Figure 9. Capacitance Characteristics
-10
I = -1.1 A
D
-8
-6
V = -5 V
DS
-10
-4
-2
0
0123456
Q g , GATE CHARGE (nC)
Figure 10. Gate Charge Characteristics
7
VIN
VGS
RGEN
G
VDD
RL
D
V OUT
DUT
S
Figure 11. Switching Test Circuit
t d(on)
ton
tr
90%
td(off)
toff
tf
90%
VO U T
VIN
10%
10%
50%
10%
90%
50%
PULSE WIDTH
INVERTED
Figure 12. Switching Waveforms
NDS356P Rev. E1
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet NDS356P.PDF ] | |
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