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PDF NTE2732A Data sheet ( Hoja de datos )
| Número de pieza | NTE2732A | |
| Descripción | Integrated Circuit 32K (4K x 8) NMOS UV Erasable PROM | |
| Fabricantes | NTE | |
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NTE2732A
Integrated Circuit
32K (4K x 8) NMOS UV Erasable PROM
Description:
The NTE2732A is a 32,768–bits ultraviolet erasable and electrically programmable read–only
memory (EPROM) organized as 4,096 words by 8 bits and manufactured using N–Channel Si–Gate
MOS processing. With its single +5V power supply and with an access time of 200ns, the NTE2732A
is ideal for use with high performance +5V microprocessors such as the NTE3880.
The NTE2732A has an important feature which is the separate output control, Output Enable (OE)
from the Chip Enable control (CE). The OE control eliminates bus contention in multiple bus micropro-
cessor systems.
The NTE2732A also features an standby mode which reduces the power dissipation without increas-
ing access time. The active current is 125mA while the maximum standby mode is achieved by apply-
ing a TTL–high signal to the CE input.
Features:
D Fast Access Time: 200ns Max
D 0° to +70°C Standard Temperature Range
D Single +5V Power Supply
D Low Standby Current (35mA Max)
D Inputs and Outputs TTL Compatible During Read and Program
D Completely Static
Absolute Maximum Ratings: (Note 1)
All Input or Output Voltages with respect to GND, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +6 to –0.6V
Supply Voltage with respect to GND during Program, Vpp . . . . . . . . . . . . . . . . . . . . . . . +22 to –0.6V
Ambient Temperature under Bias, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –10° to +80°C
Storage Temperature Range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65° to +125°C
Note 1. Stresses above those listed under “Absolute Maximum Ratings” may cause permanent
damage to the device. This is a stress rating only and functional operation of the device at
these or any other conditions above those indicated in the operational sections of this specifi-
cation is not implied. Exposure to absolute maximum rating conditions for extended periods
may affect device reliability.
Operating Modes:
MODE
READ
STANDBY
PROGRAM
PROGRAM VERIFTY
PROGRAM INHIBIT
PINS
CE
(18)
VIL
VIH
VIL
VIL
VIH
OE/Vpp
(20)
VIL
Don’t Care
VPP
VIL
VPP
VCC OUTPUTS
(24) (9 – 11, 13–17)
+5 DOUT
+5 HIGH Z
+5 DIN
+5 DOUT
+5 HIGH Z
1 page  
Programming (CAUTION: Exeeding 22V on pin (Vpp) will damage the NTE2732A);
When delivered, and after each erasure, all bits of the NTE2732A are in the “1” state. Data is
introduced by selectively programming “0”s into the desired bit locations. Although only “0”s will be
programmed, both “1”s and “0”s can be presented in the data word. The only way to change a “0”
to a “1” is by ultraviolet light erasure.
The NTE2732A is in the programming mode when the OE/VPP input is at 21V. It is required that a
0.1µF capacitor be placed across OE/VPP and ground to suppress spurious voltage transients which
may damage the device. The data to be programmed is applied 8 bits in parallel to the data output
pins. The levels required for the address and data inputs are TTL.
When the address and data are stable, a 50msec, active low, TTL program pulse is applied to the CE
input. A program pulse must be applied at each address location to be programmed. You can pro-
gram any location at any time–either individualy, sequentially, or at random. The program pulse has
a maximum width of 55msec. The NTE2732A must not be programmed with a DC signal applied to
the CE input.
Programming of multiple NTE2732A is in parallel with the same data can be easily accomplished due
to the simplicity of the programming requirements. Like inputs of the paralleled NTE2732As may be
connected together when they are programmed with the same data. A low level TTL pulse applied
to the CE input programs the paralleled NTE2732As.
Program Inhibit:
Programming of multiple NTE2732As in parallel with different data is also easily accomplished. Ex-
cept for CE, all like inputs (including OE/Vpp) of the parallel NTE2732As may be common. A TTL level
program pulse applied to a NTE2732As CE input with OE/VPP at 21V will program that NTE2732A.
A high level CE input inhibits the other NTE2732As from being programmed.
Program Verify:
A verify should be performed on the programmed bits to determine that they were correctly pro-
grammed. The verify is accomplished with OE/VPP and CE at VIL.
Erasure Operation:
The erasure characteristics of the NTE2732A are such that erasure begins when the cells are ex-
posed to light with wavelengths shorter than approximately 4000 Angstroms (A). It should be noted
that sunlight and certain types of fluorescent lamps have wavelengths in the 3000–4000 A range.
Data shows that constant exposure to room level fluorescent lighting could erase a typical NTE2732A
in approximately 3 years, while it would take approximately 1 week to cause erasure when exposed
to the direct sunlight. If the NTE2732A is to be exposed to these types of lighting conditions for ex-
tended periods of time, it is suggested that opaque labels be put over the NTE2732A window to pre-
vent unintentional erasure.
The recommended erasure procedure for the NTE2732A is exposure to shortwave ultraviolet light
which has a wavelength of 2537 Angstroms (A). The integrated dose (i.e. UV intensity x exposure
time) for erasure time with this dosage is approximately 15 to 20 minutes using an ultraviolet lamp
with 12000 µW/cm2 power rating. The NTE2732A should be placed within 2.5cm of the lamp tubes
during erasure. Some lamps have a filter on their tubes which should be removed before era-
sure.
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet NTE2732A.PDF ] | |
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