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PDF 908E624 Datasheet ( Hoja de datos )

Número de pieza 908E624
Descripción Integrated Triple High Side Switch
Fabricantes Motorola Inc 
Logotipo Motorola  Inc Logotipo

Total 30 Páginas
		
908E624 Hoja de datos, Descripción, Manual
Freescale Semiconductor
Technical Data
Document Number: MM908E624
Rev. 11.0, 4/2012
Integrated Triple High Side
Switch with Embedded MCU
and LIN Serial Communication
for Relay Drivers
The 908E624 is an integrated single-package solution that
includes a high performance HC08 microcontroller with a
SMARTMOS analog control IC. The HC08 includes flash memory, a
timer, enhanced serial communications interface (ESCI), an analog-
to-digital converter (ADC), internal serial peripheral interface (SPI),
and an internal clock generator module. The analog control die
provides three high side outputs with diagnostic functions, voltage
regulator, watchdog, current sense operational amplifier, and local
interconnect network (LIN) physical layer.
The single package solution, together with LIN, provides optimal
application performance adjustments and space saving PCB design.
It is well-suited for the control of automotive high current motors
applications using relays (e.g., window lifts, fans, and sun roofs).
Features
• High performance M68HC908EY16 core
• 16 KB of on-chip flash memory, 512 B of RAM
• Internal clock generator module
• Two 16-bit, two-channel timers
• 10-bit ADC
• LIN physical layer interface
• Low dropout voltage regulator
• Three high side outputs
• Two wake-up inputs
• 16 microcontroller I/Os
908E624
908E624
HIGH SIDE SWITCH
EW (Pb-FREE) SUFFIX
98ASA99294D
54-pin SOICW
ORDERING INFORMATION
Device
(Add an R2 suffix for Tape
and reel orders)
Temperature
Range (TA)
Package
MM908E624ACPEW
MM908E624AYPEW
-40°C to 85°C
-40°C to 125°C
54 SOICW
LIN Interface
5.0 V
Microcontroller
Ports
LIN
VREFH
VDDA
EVDD
VCC
VDD
VREFL
VSSA
EVSS
AGND
GND
VSP1
RXD
PTE1/RXD
RST
RST_A
IRQ
IRQ_A
PTD0/TACH0
PW/MIN
PTA0-4
PTB1;3-7
PTC2-4
PTD1/TACH1
VSP
HS3
L1
L2
HS1
HS2
+E
WDCONF
OUT
-E
VBAT
M
To Microcontroller A/D Channel
Figure 1. 908E624 Simplified Application Diagram
*This document contains certain information on a product under development.
Freescale reserves the right to change or discontinue this product without notice.
© Freescale Semiconductor, Inc., 2012. All rights reserved.

1 page

908E624 pdf
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
Table 2. Maximum Ratings
All voltages are with respect to ground unless otherwise noted. Exceeding limits on any pin may cause permanent damage to
the device.
ELECTRICAL RATINGS
Rating
Symbol
Value
Unit
Supply Voltage
Analog Chip Supply Voltage under Normal Operation (Steady-state)
Analog Chip Supply Voltage under Transient Conditions
MCU Chip Supply Voltage
Input Pin Voltage
Analog Chip
Microcontroller Chip
Maximum Microcontroller Current per Pin
All Pins except VDD, VSS, PTA0:PTA6, PTC0:PTC1
PTA0:PTA6, PTC0:PTC1 Pins
Maximum Microcontroller VSS Output Current
Maximum Microcontroller VDD Input Current
Current Sense Operational Amplifier
Maximum Input Voltage, +E, -E Pins
Maximum Input Current, +E, -E Pins
Maximum Output Voltage, OUT Pin
Maximum Output Current, OUT Pin
LIN Supply Voltage
Normal Operation (Steady-state)
Transient Input Voltage (per ISO7637 Specification) and with
External Components (Figure 4, page 13)
VSUP(SS)
VSUP(PK)
VDD
VIN (ANALOG)
VIN (MCU)
IPIN(1)
IPIN(2)
IMVSS
IMVDD
V + E-E
I + E-E
VOUT
IOUT
VBUS(SS)
VBUS(PK)
-0.3 to 27
-0.3 to 40
-0.3 to 5.5
-0.3 to VDD+0.3
VSS-0.3 to VDD+0.3
±15
± 25
100
100
-0.3 to 7.0
± 20
-0.3 to VCC+0.3
± 20
-18 to 40
-150 to 100
V
V
mA
mA
mA
V
mA
V
mA
V
L1 and L2 Pin Voltage
Normal Operation with a 33 kΩ resistor (Steady-state)
Transient Input Voltage (per ISO7637 Specification) and with
External Components (Figure 4, page 13)
VWAKE(SS)
VWAKE(PK)
-18 to 40
-100 to 100
V
ESD Voltage
Human Body Model (1)
Machine Model (1)
Charge Device Model (1)
VESD1
VESD2
VESD3
± 2000
±100
± 500
V
Notes
1. ESD1 testing is performed in accordance with the Human Body Model (CZAP = 100 pF, RZAP = 1500 Ω), the Machine Model (CZAP =
200 pF, RZAP = 0 Ω), and the Charge Device Model, Robotic (CZAP = 4.0 pF).
Analog Integrated Circuit Device Data
Freescale Semiconductor
908E624
5

5 Page

908E624 arduino
ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
Table 4. Dynamic Electrical Characteristics
All characteristics are for the analog chip only. Please refer to the 68HC908EY16 data sheet for characteristics of the
microcontroller chip. Characteristics noted under conditions 9.0 V VSUP 16 V, -40 °C TJ 125 °C, unless otherwise noted.
Typical values noted reflect the approximate parameter mean at TA = 25 °C under nominal conditions, unless otherwise noted.
Characteristic
Symbol Min Typ Max Unit
LIN PHYSICAL LAYER
Driver Characteristics for Normal Slew Rate (19), (20)
Dominant Propagation Delay TXD to LIN
Dominant Propagation Delay TXD to LIN
Recessive Propagation Delay TXD to LIN
Recessive Propagation Delay TXD to LIN
Propagation Delay Symmetry: tDOM-MIN - tREC-MAX
Propagation Delay Symmetry: tDOM-MAX - tREC-MIN
Driver Characteristics for Slow Slew Rate (19), (21)
t DOM-MIN
t DOM-MAX
t REC-MIN
t REC-MAX
DT1
DT2
-10.44
50 μs
50 μs
50 μs
50 μs
μs
11 μs
Dominant Propagation Delay TXD to LIN
Dominant Propagation Delay TXD to LIN
Recessive Propagation Delay TXD to LIN
Recessive Propagation Delay TXD to LIN
Propagation Delay Symmetry: tDOM-MIN - tREC-MAX
Propagation Delay Symmetry: tDOM-MAX - tREC-MIN
Driver Characteristics for Fast Slew Rate
t DOM-MIN
— 100 μs
t DOM-MAX
— 100 μs
t REC-MIN
— 100 μs
t REC-MAX
— 100 μs
DT1S -22 —
μs
DT2S — — 23 μs
LIN High Slew Rate (Programming Mode)
SRFAST
15
— V/μs
Receiver Characteristics and Wake-Up Timings
Receiver Dominant Propagation Delay (22)
Receiver Recessive Propagation Delay (22)
Receiver Propagation Delay Symmetry
Bus Wake-up Deglitcher
Bus Wake-up Event Reported (23)
tRL — 3.5 6.0 μs
tRH — 3.5 6.0 μs
t R-SYM
- 2.0
2.0 μs
t PROPWL
35
— 150 μs
tWAKE — 20 — μs
Notes
19. VSUP from 7.0 V to 18 V, bus load R0 and C0 1.0 nF/1.0 kΩ, 6.8 nF/660 Ω, 10 nF/500 Ω. Measurement thresholds: 50% of TXD signal
to LIN signal threshold defined at each parameter.
20. See Figure 6, page 14.
21. See Figure 7, page 14.
22. Measured between LIN signal threshold VIL or VIH and 50% of RXD signal.
23. tWAKE is typically 2 internal clock cycles after LIN rising edge detected. See Figure 8 and Figure 9, page 15. In Sleep mode the VDD
rise time is strongly dependent upon the decoupling capacitor at VDD pin.
Analog Integrated Circuit Device Data
Freescale Semiconductor
908E624
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