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PDF 8XC196KB Data sheet ( Hoja de datos )

Número de pieza 8XC196KB
Descripción ADVANCED 16-BIT CHMOS MICROCONTROLLER ROMless OR ROM
Fabricantes Intel Corporation 
Logotipo Intel Corporation Logotipo



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8XC196KB
ADVANCED 16-BIT CHMOS MICROCONTROLLER
ROMless OR ROM
Automotive
Y b40 C to a125 C Ambient
Y 232 Bytes of On-Chip Register RAM
Y 8 Kbytes of On-Chip ROM (Optional)
Y High-Performance CHMOS Process
Y Register-to-Register Architecture
Y 10-Bit A D Converter with S H
Y Five 8-Bit I O Ports
Y 28 Interrupt Sources
Y Pulse Width Modulated Output
Y Powerdown and Idle Modes
Y High Speed I O Subsystem
Y Dynamically Configurable 8 16-Bit
Buswidth
Y Full Duplex Serial Port
Y Dedicated Baud Rate Generator
Y 1 725 ms 16 x 16 Multiply
Y 3 ms 32 16 Divide
Y 16-Bit Watchdog Timer
Y 16-Bit Timer
Y 16-Bit Up Down Counter w Capture
Y Four 16-Bit Software Timers
Y HOLD HOLDA Bus Protocol
The 8XC196KB 16-bit microcontroller comes with 8 Kbytes of on-chip mask programmable ROM or in ROM-
less versions All devices are high performance members of the 8096 microcontroller family The 8XC196KB is
pin-to-pin compatible and uses a true superset of the 8096 instructions Intel’s CHMOS process provides a
high performance processor along with low power consumption To further reduce power requirements the
processor can be placed into Idle or Powerdown Mode
Bit byte word and some 32-bit operations are available on the 8XC196KB With a 16 MHz oscillator a 16-bit
addition takes 0 495 ms and the instruction times average 0 375 ms to 1 125 ms in typical applications
Four high-speed capture inputs are provided to record times when events occur 4 a 2 high-speed outputs are
available for pulse or waveform generation The high-speed output can also generate four software timers or
start an A D conversion Events can be based on the 16-bit timer or a 16-bit up down counter
Also provided on-chip are an 8 channel 10-bit A D converter with Sample and Hold a serial port with
synchronous asynchronous modes and on-chip baud rate generator a 16-bit watchdog timer pulse width
modulated output with prescaler and an on-chip clock failure detect circuitry
Figure 1 8XC196KB Block Diagram
270679 – 1
Other brands and names are the property of their respective owners
Information in this document is provided in connection with Intel products Intel assumes no liability whatsoever including infringement of any patent or
copyright for sale and use of Intel products except as provided in Intel’s Terms and Conditions of Sale for such products Intel retains the right to make
changes to these specifications at any time without notice Microcomputer Products may have minor variations to this specification known as errata
COPYRIGHT INTEL CORPORATION 1995
February 1995
Order Number 270679-005

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8XC196KB pdf
AUTOMOTIVE 8XC196KB
PIN DESCRIPTIONS
Symbol
Name and Function
VCC
VSS
VREF
Main Supply Voltage (a5V)
Digital Circuit Ground (0V) There are three VSS pins all of which MUST be connected
Reference for the A D Converter (a5V) VREF is also the supply voltage to the analog portion
of the A D converter and the logic used to read Port 0 Must be connected for A D and Port 0
to function
ANGND
VPP
XTAL1
Reference Ground for the A D Converter Must be held at nominally the same potential as
VSS
Programming Voltage for the EPROM Parts It should be a12 75V for programming This pin
was VBB on 8X9X-90 parts It is also the timing pin for the return from powerdown circuit
Connect this pin with a 1 mF capacitor to VSS and a 1 MX resistor to VCC If this function is not
used VPP may be tied to VCC
Input of the Oscillator Inverter and the Internal Clock Generator
XTAL2
Output of the Oscillator Inverter
CLKOUT
Output of the Internal Clock Generator The frequency of CLKOUT is the oscillator
frequency It has a 50% duty cycle
RESET
Reset Input to the Chip Input low for at least 4 state times will reset the chip The subsequent
low to high transition resynchronizes CLKOUT and commences a 10-state time sequence in
which the PSW is cleared a byte is read from 2018H loading the CCB and a jump to location
2080H is executed Input high for normal operation RESET has an internal pullup
BUSWIDTH
NMI
Input for Bus Width Selection If CCR bit 1 is a one this pin selects the buswidth for the bus
cycle in progress If BUSWIDTH is low an 8-bit cycle occurs If BUSWIDTH is high a 16-bit
cycle occurs If CCR bit 1 is a 0 the bus is always an 8-bit bus This pin is the TEST pin on the
8X9X-90 parts Systems with TEST tied to VCC need NOT change
A positive transition causes an interrupt vector through external memory location 203EH
INST
Output High during an External Memory Read Indicates the read is an instruction fetch INST
is valid throughout the bus cycle INST is active only during external memory fetches during
internal EPROM ROM fetches INST is held low
EA Input for Memory Select (External Access) EA equal to a TTL-high causes memory accesses
to locations 2000H through 3FFFH to be directed to on-chip EPROM ROM EA equal to a
TTL-low causes accesses to these locations to be directed to off-chip memory EA e
a12 75V causes execution to begin in the Programming Mode EA has an internal pulldown
so it defaults to execute from external memory unless otherwise driven EA is latched at
reset
ALE ADV
Address Latch Enable or Address Valid Output as Selected by CCR Both pin options provide
a latch to demultiplex the address from the address data bus When the pin is ADV it goes
inactive (high) at the end of the bus cycle ADV can be used as a chip select for external
memory ALE ADV is active only during external memory accesses
5

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8XC196KB arduino
Ready Buswidth Timing
AUTOMOTIVE 8XC196KB
270679 – 5
HOLD HLDA Timings
Symbol
THVCH
TCLHAL
TCLBRL
THALAZ
THALBZ
TCLHAH
TCLBRH
THAHAX
THAHBV
TCLLH
Description
HOLD Setup
80C196KB
83C196KB
CLKOUT Low to HLDA Low
CLKOUT Low to BREQ Low
HLDA Low to Address Float
80C196KB
83C196KB
HLDA Low to BHE INST RD WR Float
CLKOUT Low to HLDA High
CLKOUT Low to BREQ High
HLDA High to Address No Longer Float
HLDA High to BHE INST RD WR Valid
CLKOUT Low to ALE High
NOTE
1 To guarantee recognition at next clock
Min
75
85
b15
b15
b15
b15
b5
b20
b5
Max
15
15
15
20
15
15
15
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
1
11

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