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PDF 89C5X Data sheet ( Hoja de datos )

Número de pieza 89C5X
Descripción FlashFlex51 MCU
Fabricantes ETC 
Logotipo ETC Logotipo



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FlashFlex51 MCU
SST89C54 / SST89C58
FEATURES:
SST89C5xFlashFlex51 MCU
Data Sheet
• 8-bit 8051-Compatible Microcontroller (MCU)
with Embedded SuperFlash Memory
– Fully Software Compatible
– Development Toolset Compatible
– Pin-For-Pin Package Compatible
• SST89C54/58 Operation
– 0 to 33MHz at 5V
• 256 Bytes Internal RAM
• Dual Block SuperFlash EEPROM
– SST89C58:
32 KByte primary block (128-Byte sector size) +
4 KByte secondary block (64-Byte sector size)
– SST89C54:
16 KByte primary block (128-Byte sector size) +
4 KByte secondary block (64-Byte sector size)
– Individual Block Security Lock with SoftLock
– Concurrent operation during
In-Application Programming (IAP)
– Memory Re-mapping for Interrupt Support
during IAP
• Support External Address Range up to 64
KByte of Program and Data Memory
• Three High Current Drive Ports (16 mA each)
• Three 16-bit Timers/Counters
• Full-Duplex Serial Port (UART)
• Six Interrupt Sources at 2 Priority Levels
• Programmable Watchdog Timer (WDT)
• Four 8-bit I/O Ports (32 I/O Pins)
• TTL- and CMOS-Compatible Logic Levels
• Low Power Modes
– Power-down Mode with External Interrupt Wake-up
– Standby (Stop Clock)
• Low Voltage at 2.7V (0 to 12MHz)
• PDIP-40, PLCC-44 and TQFP-44 Packages
• Temperature Ranges:
– Commercial (0°C to +70°C)
– Industrial (-40°C to +85°C)
PRODUCT DESCRIPTION
The SST89C54 and SST89C58 are members of the
FlashFlex51 family of 8-bit microcontroller products
designed and manufactured with the state-of-the-art
SuperFlash CMOS semiconductor process technology.
The device uses the same 8051 instruction set and is pin-
for-pin compatible with standard 8051 microcontroller
devices.
The device comes with 20/36 KByte of on-chip flash
EEPROM program memory using SST’s patented and pro-
prietary CMOS SuperFlash EEPROM technology with
SST’s field-enhancing, tunneling injector, split-gate memory
cells. The SuperFlash memory is partitioned into 2 indepen-
dent program memory blocks. The primary SuperFlash
Block 0 occupies 16/32 KByte of internal program memory
space and the secondary SuperFlash Block 1 occupies 4
KByte of internal program memory space. The 4 KByte
secondary SuperFlash block can be mapped to the highest
or lowest location of the 64 KByte address space; it can also
be hidden from the program counter and used as an inde-
pendent EEPROM-like data memory. The flash memory
blocks can be programmed via a standard 87C5x OTP
EPROM programmer fitted with a special adapter and firm-
ware for SST’s devices. During the power-on reset, the
device can be configured as a slave to an external host for
source code storage or as a master to an external host for
an in-application programming (IAP) operation. The device
is designed to be programmed in-system and in-application
on the printed circuit board for maximum flexibility. The
device is pre-programmed with an example of the bootstrap
loader in the memory, demonstrating the initial user pro-
gram code loading or subsequent user code updating via
the IAP operation. An example of bootstrap loader is avail-
able for the user’s reference and convenience only. SST
does not guarantee the functionality nor the usefulness of
the sample bootstrap loader. Chip-Erase operations will
erase the pre-programmed sample code.
In addition to 20/36 KByte of SuperFlash EEPROM pro-
gram memory on-chip, the device can address up to 64
KByte of external program memory. In addition to 256 x8
bits of on-chip RAM, up to 64 KByte of external RAM can
be addressed.
SST’s highly reliable, patented SuperFlash technology
and memory cell architecture have a number of impor-
tant advantages for designing and manufacturing flash
EEPROMs. These advantages translate into signifi-
cant cost and reliability benefits for our customers.
©2002 Silicon Storage Technology, Inc.
S71131-03-000 9/02
344
1
The SST logo, SuperFlash, and FlashFlex are registered trademarks of Silicon Storage Technology, Inc.
These specifications are subject to change without notice.

1 page




89C5X pdf
FlashFlex51 MCU
SST89C54 / SST89C58
LIST OF TABLES
Data Sheet
TABLE 2-1: Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
TABLE 3-1: Re-mapping Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
TABLE 3-2: FlashFlex51 SFR Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
TABLE 3-3: CPU related SFRs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
TABLE 3-4: Flash Memory Programming SFRs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
TABLE 3-5: Watchdog Timer SFRs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
TABLE 3-6: Timer/Counters SFRs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
TABLE 3-7: Interface SFRs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
TABLE 4-1: External Host Mode Commands. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
TABLE 4-2: Product Identification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
TABLE 4-3: In-Application Programming Mode Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
TABLE 8-1: Security Lock Options. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
TABLE 8-2: Security Lock Access Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
TABLE 10-1: SST89C54/58 Power Saving Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
TABLE 11-1: Recommended values for C1 and C2 by crystal type. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
TABLE 12-1: Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
TABLE 12-2: Reliability Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
TABLE 12-3: AC Conditions of Test. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
TABLE 12-4: Recommended System Power-up Timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
TABLE 12-5: Pin Impedance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
TABLE 12-6: DC Electrical Characteristics for 33MHz devices; 4.5-5.5V . . . . . . . . . . . . . . . . . . . . . . . . . 37
TABLE 12-7: DC Electrical Characteristics for 12MHz devices; 3.0-3.6V . . . . . . . . . . . . . . . . . . . . . . . . . 38
TABLE 12-8: AC Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
TABLE 12-9: External Clock Drive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
TABLE 12-10: Serial Port Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
TABLE 12-11: Flash Memory Programming/Verification Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
©2002 Silicon Storage Technology, Inc.
5
S71131-03-000 9/02 344

5 Page





89C5X arduino
FlashFlex51 MCU
SST89C54 / SST89C58
EA# = 1 & SFCF[7] = 1
FFFFH
F000H
EFFFH
4 KByte
INTERNAL
(Block 1)
EA# = 1 & SFCF[7] = 0
FFFFH
FFFFH
EA# = 0
44 KByte
EXTERNAL
48 KByte
EXTERNAL
64 KByte
EXTERNAL
Data Sheet
4000H
3FFFH
0000H
16 KByte
INTERNAL
(Block 0)
4000H
3FFFH
0000H
16 KByte
INTERNAL
(Block 0)
FIGURE 3-2: SST89C54 PROGRAM MEMORY ORGANIZATION
0000H
344 ILL F21.2
EA# = 1 & SFCF[7] = 1
FFFFH
F000H
EFFFH
4 KByte
INTERNAL
(Block 1)
28 KByte
EXTERNAL
8000H
7FFFH
EA# = 1 & SFCF[7] = 0
FFFFH
FFFFH
EA# = 0
32 KByte
EXTERNAL
8000H
7FFFH
64 KByte
EXTERNAL
32 KByte
INTERNAL
(Block 0)
32 KByte
INTERNAL
(Block 0)
0000H
0000H
FIGURE 3-3: SST89C58 PROGRAM MEMORY ORGANIZATION
0000H
344 ILL F11.2
©2002 Silicon Storage Technology, Inc.
11
S71131-03-000 9/02 344

11 Page







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