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PDF 87L54 Data sheet ( Hoja de datos )

Número de pieza 87L54
Descripción LOW VOLTAGE CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLERS
Fabricantes Intel Corporation 
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8XL52 54 58
LOW VOLTAGE
CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLERS
Commercial Express
87L52 80L52 87L54 80L54 87L58 80L58
Y High Performance CHMOS OTP ROM
Y 6 Interrupt Sources
Y Low Voltage Operation
Y Four Level Interrupt Priority
Y 20 MHz Commercial 16 MHz Express
Operation
Y Three 16-Bit Timer Counters
Y Up Down Timer Counter
Y Three Level Program Lock System
Y 8K 16K 32K On-Chip Program Memory
Y 256 Bytes of On-Chip Data RAM
Y Improved Quick Pulse Programming
Algorithm
Y Boolean Processor
Y 32 Programmable I O Lines
Y Programmable Serial Channel with
Framing Error Detection
Automatic Address Recognition
Y 64K External Program Memory Space
Y 64K External Data Memory Space
Y MCS 51 Microcontroller Compatible
Instruction Set
Y Power Saving Idle and Power Down
Modes
Y ONCE (On-Circuit Emulation) Mode
Y Extended Temperature Range
(b40 C to a85 C)
MEMORY ORGANIZATION
OTP ROM
Version
87L52
87L54
87L58
ROM
Version
80L52
80L54
80L58
ROM
OTP ROM
Bytes
8K
16K
32K
RAM
Bytes
256
256
256
These devices can address up to 64 Kbytes of external program data memory
The Intel 8XL52 8XL54 8XL58 is a single-chip control oriented microcontroller which is fabricated on Intel’s
reliable CHMOS III-E technology Being a member of the MCS 51 microcontroller family the 8XL52 8XL54
8XL58 uses the same powerful instruction set has the same architecture and is pin-for-pin compatible with
the existing MCS 51 microcontroller products
The 8XL5X is a 3V version of current 8XC5X and will operate from 2 7V to 3 6V at a frequency range of
3 5 MHz to 16 MHz (Express) 20 MHz (Commercial)
For the remainder of this document the 8XL52 8XL54 8XL58 will be referred to as the 8XL5X unless
information applies to a specific device
Other brands and names are the property of their respective owners
Information in this document is provided in connection with Intel products Intel assumes no liability whatsoever including infringement of any patent or
copyright for sale and use of Intel products except as provided in Intel’s Terms and Conditions of Sale for such products Intel retains the right to make
changes to these specifications at any time without notice Microcomputer Products may have minor variations to this specification known as errata
COPYRIGHT INTEL CORPORATION 1995
November 1994
Order Number 272468-002

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87L54 pdf
8XL52 54 58
ALE Address Latch Enable output pulse for latching
the low byte of the address during accesses to ex-
ternal memory This pin (ALE PROG) is also the
program pulse input during OTP ROM programming
for the 87L5X
In normal operation ALE is emitted at a constant
rate of the oscillator frequency and may be used
for external timing or clocking purposes Note how-
ever that one ALE pulse is skipped during each ac-
cess to external Data Memory
If desired ALE operation can be disabled by setting
bit 0 of SFR location 8EH With this bit set the pin is
weakly pulled high However the ALE disable fea-
ture will be suspended during a MOVX or MOVC in-
struction idle mode power down mode and ICE
mode The ALE disable feature will be terminated by
reset When the ALE disable feature is suspended or
terminated the ALE pin will no longer be pulled up
weakly Setting the ALE-disable bit has no affect if
the microcontroller is in external execution mode
Throughout the remainder of this data sheet ALE
will refer to the signal coming out of the ALE PROG
pin and the pin will be referred to as the ALE PROG
pin
PSEN Program Store Enable is the read strobe to
external Program Memory
When the 8XL5X is executing code from external
Program Memory PSEN is activated twice each ma-
chine cycle except that two PSEN activations are
skipped during each access to external Data Memo-
ry
EA VPP External Access enable EA must be
strapped to VSS in order to enable the device to
fetch code from external Program Memory locations
0000H to 0FFFH Note however that if either of the
Program Lock bits are programmed EA will be inter-
nally latched on reset
EA must be strapped to VCC for internal program
executions
This pin also receives the programming supply volt-
age (VPP) during OTP ROM programming
XTAL1 Input to the inverting oscillator amplifier
XTAL2 Output from the inverting oscillator amplifier
OSCILLATOR CHARACTERISTICS
XTAL1 and XTAL2 are the input and output respec-
tively of a inverting amplifier which can be config-
ured for use as an on-chip oscillator as shown in
Figure 3 Either a quartz crystal or ceramic resonator
may be used More detailed information concerning
the use of the on-chip oscillator is available in Appli-
cation Note AP-155 ‘‘Oscillators for Microcontrol-
lers ’’
To drive the device from an external clock source
XTAL1 should be driven while XTAL2 floats as
shown in Figure 4 There are no requirements on the
duty cycle of the external clock signal since the in-
put to the internal clocking circuitry is through a di-
vide-by-two flip-flop but minimum and maximum
high and low times specified on the data sheet must
be observed
An external oscillator may encounter as much as a
100 pF load at XTAL1 when it starts up This is due
to interaction between the amplifier and its feedback
capacitance Once the external signal meets the VIL
and VIH specifications the capacitance will not ex-
ceed 20 pF
272468 – 4
C1 C2 e 30 pF g10 pF for Crystals
For Ceramic Resonators contact resonator manufacturer
Figure 3 Oscillator Connections
272468 – 5
Figure 4 External Clock Drive Configuration
IDLE MODE
The user’s software can invoke the Idle Mode When
the microcontroller is in this mode power consump-
tion is reduced The Special Function Registers and
the onboard RAM retain their values during Idle but
the processor stops executing instructions Idle
Mode will be exited if the chip is reset or if an en-
abled interrupt occurs The PCA timer counter can
optionally be left running or paused during Idle
Mode
5

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87L54 arduino
8XL52 54 58
EXPLANATION OF THE AC SYMBOLS
Each timing symbol has 5 characters The first char-
acter is always a ‘T’ (stands for time) The other
characters depending on their positions stand for
the name of a signal or the logical status of that
signal The following is a list of all the characters and
what they stand for
A Address
C Clock
D Input Data
H Logic level HIGH
I Instruction (program memory contents)
L Logic level LOW or ALE
P PSEN
Q Output Data
R RD signal
T Time
V Valid
W WR signal
X No longer a valid logic level
Z Float
For example
TAVLL e Time from Address Valid to ALE Low
TLLPL e Time from ALE Low to PSEN Low
AC CHARACTERISTICS (Over Operating Conditions Load Capacitance for Port 0 ALE PROG and
PSEN e 100 pF Load Capacitance for All Other Outputs e 80 pF)
EXTERNAL MEMORY CHARACTERISTICS
All parameter values apply to all devices unless otherwise indicated In this table 8XL5X refers to 8XL5X and
8XL5X-1
Symbol
Parameter
12 MHz
Oscillator
Min Max
20 MHz
Oscillator
Min Max
Variable
Oscillator
Min Max
Units
1 TCLCL
Oscillator Frequency
8XL5X
8XL5X-1
8XL5X-20
3 5 12 MHz
3 5 16 MHz
3 5 20 MHz
TLHLL ALE Pulse Width
127
60
2 TCLCL b 40
ns
TAVLL Address Valid to
43
10
TCLCL b 40
ALE Low
ns
TLLAX Address Hold After 53 20 TCLCL b 30
ALE Low
ns
TLLIV
ALE Low to Valid
Instruction In
8XL5X
8XL5X-20
234
125
4 TCLCL b 100
4 TCLCL b 75
ns
ns
TLLPL
ALE Low to PSEN
53
20
TCLCL b 30
Low
ns
TPLPH PSEN Pulse Width 205 105 3 TCLCL b 45
ns
TPLIV
PSEN Low to Valid
Instruction In
8XL5X
8XL5X-20
145
60
3 TCLCL b 105
3 TCLCL b 90
ns
ns
TPXIX
Input Instruction
Hold After PSEN
0
0
0
ns
11

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