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PDF NJU3551 Data sheet ( Hoja de datos )
| Número de pieza | NJU3551 | |
| Descripción | 4-BIT SINGLE CHIP OTP MICRO CONTROLLER | |
| Fabricantes | New Japan Radio | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de NJU3551 (archivo pdf) en la parte inferior de esta página. Total 13 Páginas | ||
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NJU3551
PRELIMINARY
4-BIT SINGLE CHIP OTP MICRO CONTROLLER
s GENERAL DESCRIPTION
The NJU3551 is the C-MOS 4-bit Single Chip OTP type
Micro Controller with programmable Flash Memory.
It is completely compatible with the NJU3501 in function
and the pin configuration. Therefore, the NJU3551 is
suitable for the final evaluation before NJU3501 mask
generation, the small quantity production and short lead-
time.
s PACKAGE OUTLINE
* In this data sheet, only OTP programming and the
difference between NJU3551 and NJU3501 are
mentioned mainly.
Therefore the detail function and specification should
be referred on the NJU3501 data sheet.
NJU3551D
NJU3551G
s FEATURES
q Internal One Time Programmable ROM 512 X 8bits
q Internal Data RAM
64 X 4bits
q Wide operating voltage range
2.7V ~ 5.5V
q Package outline
DIP20 / SOP20
q ROM programmer “SUPERPRO/L” by XELTEK co,.
s PIN CONFIGURATION IN OTP PROGRAMMING MODE
Open
D0
D1
D2
D3
Open
PROM
CLK
REQ
VSS
1
2
3
4
5
6
7
8
9
10
20 VDD
19 Open
18 CNT2
17 CNT1
16 D7
15 D6
14 D5
13 D4
12 Open
11 RESET
Note) The pin configuration in Normal operating mode is the same as NJU3501.
-1-
1 page  
NJU3551
s ELECTRICAL CHARACTERISTICS DC CHARACTERISTICS 1
PARAMETER
SYM
BOL
CONDITIONS
Supply Voltage
VDD VDD
VDD
IDD1 VDD=5V, fOSC=2MHz
X’tal Oscillation in Reset
VDD
IDD2 VDD=5V, fOSC=2MHz
Ceramic Oscillation in Reset
Supply Current
VDD
IDD3 VDD=5V, fOSC=2MHz
CR Oscillation in Reset
High-Level
IDD4
VDD
VDD=5V, STANDBY Mode
IDD5
VDD
VDD=5V, fOSC=4MHz, Operating
VIH1
PA0~PA3, PB0~PB3, SDO/PC0,
SDI(O)/PC1, SCK/PC2
Input Voltage
Low-level
Input Voltage
VIH2
VIH3
VIL1
VIL2
VIL3
High-Level
Input Current
IIH
PD0, PD1, EXTI/PE0, RESET
OSC1
PA0~PA3, PB0~PB3, SDO/PC0,
SDI(O)/PC1, SCK/PC2
PD0, PD1, EXTI/PE0, RESET
OSC1
VDD=5.5V, VIN=5.5V
PA0~PA3, PB0~PB3, SDO/PC0,
SDI(O)/PC1, SCK/PC2, PD0, PD1,
EXTI/PE0, RESET
VDD=5.5V, VIN=0V
Without pull-up resistance
IIL1 PA0~PA3, PB0~PB3, SDO/PC0,
SDI(O)/PC1, SCK/PC2, PD0, PD1,
Low-Level
Input Current
EXTI/PE0, RESET
VDD=5.5V, VIN=0V
With pull-up resistance
IIL2 PA0~PA3, PB0~PB3, SDO/PC0,
SDI(O)/PC1, SCK/PC2, PD0, PD1,
EXTI/PE0
High-Level
Output Voltage
VOH
IOH=-100µA
PA0~PA3, SDO/PC0, SDI(O)/PC1,
SCK/PC2, PD0, PD1
Low-Level
Output Voltage
VOL1
VOL2
IOL1=400µA
PA0~PA3, SDO/PC0, SDI(O)/PC1,
SCK/PC2, PD0, PD1
IOL2=15mA
PB0~PB3
Output
Leakage
IOD
Current
VDD=5.5V, VOH=5.5V
PB0~PB3
Input Capacitance CIN
Except VDD, VSS terminals
fOSC=1MHz
Other terminals : 0V
*1 Input/output port is set as an Input terminal.
*2 Input/output port is set as an Output terminal.
*3 Except the current through Pull-up resister.
(VDD=3.6~5.5V, VSS=0V, Ta=-20~75°C)
MIN TYP MAX UNIT NOTE
3.6 5.5 V
30 mA *3
30 mA *3
0.7VDD
0.8VDD
VDD-1.0
0
0
0
30 mA *3
20 µA
30 mA
VDD
VDD
VDD
0.3VDD
0.2VDD
1.0
V
V
V
V
V
V
*3
*3
*1
*1
*1
*1
10 µA *1
-10 µA *1
-100 µA *1
VDD-0.5
10
V *2
0.5 V *2
2.0 V *2
10 µA *2
20 pF
-5-
5 Page 
NJU3551
[MASK OPTION LIST]
SYM
BOL
FUNCTION
ICP C-MOS input with pull-up resistance
ISP
C-MOS Schmitt trigger input
with pull-up resistance
IC C-MOS input
IS C-MOS Schmitt trigger input
OC C-MOS output
IIP External interrupt input with pull-up resistance
II External interrupt input
SDP Serial data input/output with pull-up resistance
SD Serial data input/output
SO Serial data output
SCP
Serial clock input/output
with pull-up resistance
SC Serial clock input/output
IOP
Programmable input/output
with pull-up resistance
IO Programmable input/output
R Rise edge detection
F Fall edge detection
SYM
BOL
FUNCTION
MSB Serial data order MSB first
LSB Serial data order LSB first
1 1/2
2 1/4
3 1/8
4 1/16
5 1/32
6 1/64
7 1/128
8 1/256
9 1/512
a 1/1024
b 1/2048
c 1/4096
- 11 -
11 Page | ||
| Páginas | Total 13 Páginas | |
| PDF Descargar | [ Datasheet NJU3551.PDF ] | |
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