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PDF NIF5002NT1 Data sheet ( Hoja de datos )

Número de pieza NIF5002NT1
Descripción Self-Protected FET with Temperature and Current Limit
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NIF5002N
Preferred Device
Self−Protected FET
with Temperature and
Current Limit
42 V, 2.0 A, Single N−Channel, SOT−223
HDPlusdevices are an advanced series of power MOSFETs
which utilize ON Semiconductors latest MOSFET technology process
to achieve the lowest possible on−resistance per silicon area while
incorporating smart features. Integrated thermal and current limits
work together to provide short circuit protection. The devices feature
an integrated Drain−to−Gate Clamp that enables them to withstand
high energy in the avalanche mode. The Clamp also provides
additional safety margin against unexpected voltage transients.
Electrostatic Discharge (ESD) protection is provided by an integrated
Gate−to−Source Clamp.
Features
Current Limitation
Thermal Shutdown with Automatic Restart
Short Circuit Protection
IDSS Specified at Elevated Temperature
Avalanche Energy Specified
Slew Rate Control for Low Noise Switching
Overvoltage Clamped Protection
Applications
Lighting
Solenoids
Small Motors
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Symbol
Drain−to−Source Voltage Internally Clamped
Drain−to−Gate Voltage Internally Clamped
(RG = 1.0 MW)
VDSS
VDGR
Gate−to−Source Voltage
Continuous Drain Current
Power Dissipation
@ TA = 25°C (Note 1)
@ TA = 25°C (Note 2)
@ TT = 25°C (Note 3)
VGS
ID
PD
Operating Junction and Storage Temperature TJ, Tstg
Single Pulse Drain−to−Source Avalanche Energy
(VDD = 32 V, VG = 5.0 V, IPK = 1.0 A,
L = 300 mH, RG(ext) = 25 W)
THERMAL RESISTANCE RATINGS
EAS
Value
42
42
Unit
V
V
"14
V
Internally Limited
1.1 W
1.7
8.9
−55 to
150
°C
150 mJ
Rating
Symbol Value Unit
Junction−to−Ambient − Steady State (Note 1)
Junction−to−Ambient − Steady State (Note 2)
Junction−to−Tab − Steady State (Note 3)
RqJA
RqJA
RqJT
114 °C/W
72
14
1. Surface−mounted onto min pad FR4 PCB, (2 oz. Cu, 0.06thick).
2. Surface−mounted onto 2sq. FR4 board (1sq., 1 oz. Cu, 0.06thick).
3. Surface−mounted onto min pad FR4 PCB, (2 oz. Cu, 0.06thick).
© Semiconductor Components Industries, LLC, 2004
January, 2004 − Rev. 5
1
http://onsemi.com
V(BR)DSS
(Clamped)
42 V
RDS(ON) TYP
165 mW @ 10 V
ID MAX
2.0 A*
*Max current limit value is dependent on input
condition.
Drain
Gate
Input
Overvoltage
Protection
RG
ESD Protection
MPWR
Temperature Current Current
Limit
Limit Sense
Source
SOT−223
CASE 318E
Style 3
GATE
DRAIN
SOURCE
MARKING
DIAGRAM
1
4
2
3
DRAIN
(Top View)
5002N
L
YM
= Specific Device Code
= Location Code
= Year, Month
ORDERING INFORMATION
Device
Package
Shipping
NIF5002NT1
SOT−223 1000/Tape & Reel
NIF5002NT3
SOT−223 4000/Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Preferred devices are recommended choices for future use
and best overall value.
Publication Order Number:
NIF5002N/D

1 page




NIF5002NT1 pdf
NIF5002N
PACKAGE DIMENSIONS
SOT−223
CASE 318E−04
ISSUE K
A
F
4
S
1 23
B
L
G
0.08 (0003)
H
D
C
M
J
K
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
INCHES
DIM MIN MAX
A 0.249 0.263
B 0.130 0.145
C 0.060 0.068
D 0.024 0.035
F 0.115 0.126
G 0.087 0.094
H 0.0008 0.0040
J 0.009 0.014
K 0.060 0.078
L 0.033 0.041
M 0_ 10 _
S 0.264 0.287
MILLIMETERS
MIN MAX
6.30 6.70
3.30 3.70
1.50 1.75
0.60 0.89
2.90 3.20
2.20 2.40
0.020 0.100
0.24 0.35
1.50 2.00
0.85 1.05
0 _ 10 _
6.70 7.30
STYLE 3:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
http://onsemi.com
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