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PDF MAX1232 Data sheet ( Hoja de datos )

Número de pieza MAX1232
Descripción Microprocessor Monitor
Fabricantes Maxim Integrated 
Logotipo Maxim Integrated Logotipo



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MAX1232
Microprocessor Monitor
General Description
The MAX1232 microprocessor (μP) supervisory circuit
provides μP housekeeping and power-supply supervision
functions while consuming only 1/10th the power of the
DS1232. The MAX1232 enhances circuit reliability in μP
systems by monitoring the power supply, monitoring the
software execution, and providing a debounced manual
reset input. The MAX1232 is a plug-in upgrade of the
Dallas DS1232.
A reset pulse of at least 250ms duration is supplied on
power-up, power-down, and low-voltage brownout con-
ditions (5% or 10% supply tolerances can be selected
digitally). Also featured is a debounced manual reset
input that forces the reset outputs to their active states
for a minimum of 250ms. A digitally programmable watch-
dog timer monitors software execution and can be pro-
grammed for timeout settings of 150ms, 600ms, or 1.2s.
The MAX1232 requires no external components.
Applications
Computers
Controllers
Intelligent Instruments
Critical μP Power Monitoring
Typical Operating Circuit
VCC
5%/10%
TOL
TOLERANCE
SELECT
REF
PB RST DEBOUNCE
RESET
GENERATOR
MAX1232
RST
RST
TD WATCHDOG
TIMEBASE
SELECT
WATCHDOG
TIMER
ST
GND
Features
Consumes 1/10th the Power of the DS1232
Precision Voltage Monitor—Adjustable +4.5V or
+4.75V
Power-OK/Reset Pulse Width—250ms Min
No External Components
Adjustable Watchdog Timer—150ms, 600ms, or 1.2s
Debounced Manual Reset Input for External Override
Available in 8-Pin PDIP/SO and 16-Pin Wide SO
Packages
Ordering Information
PART
TEMP RANGE
PIN-PACKAGE
MAX1232C/D
0°C to +70°C
Dice*
MAX1232CPA
0°C to +70°C
8 PDIP
MAX1232CSA
0°C to +70°C
8 SO
Ordering Information continued at end of data sheet.
*Contact factory for dice specifications.
Note: Devices in PDIP and SO packages are available in both
leaded(Pb) and lead(Pb)-free packaging. Specify lead(Pb)-free by
adding the “+” symbol at the end of the part number when order-
ing. Lead-free not available for CERDIP package.
Pin Configurations
TOP VIEW
PB RST 1
TD 2
TOL 3
GND 4
MAX1232
8 VCC
7 ST
6 RST
5 RST
DIP/SO
N.C. 1
PB RST 2
N.C. 3
TD 4
N.C. 5
TOL 6
N.C. 7
GND 8
MAX1232
16 N.C.
15 VCC
14 N.C.
13 ST
12 N.C.
11 RST
10 N.C.
9 RST
WIDE SO
19-3899; Rev 2; 9/14

1 page




MAX1232 pdf
MAX1232
Microprocessor Monitor
PB RST
tPB
tPBD
VIL
RST
RST
VIH
tRST
Figure 3. Pushbutton Reset. The debounced PBRST input
ignores input pulses less than 1ms and is guaranteed to
recognize pulses of 20ms or greater.
tST
ST
tTD
NOTE: tSD IS THE MAXIMUM ELAPSED TIME BETWEEN ST HIGH-TO-LOW
TRANSITIONS (ST IS ACTIVATED BY FALLING EDGES ONLY) WHICH WILL
KEEP THE WATCHDOG TIMER FROM FORCING THE RESET OUTPUTS
ACTIVE FOR A TIME OF tRST. tTD IS A FUNCTION OF THE VOLTAGE AT
THE TD PIN, AS TABULATED BELOW.
CONDITION
TD pin = 0V
TD pin = open
TD pin = VCC
MIN
62.5ms
250ms
500ms
tTD
TYP
150ms
250ms
1200ms
MAX
250ms
1000ms
2000ms
Figure 4. Watchdog Strobe Input
tF
VCC
+4.75V
+4.25V
Figure 5. Power-Down Slew Rate
tR
+4.75V
+4.25V
VCC
Figure 6. Power-Up Slew Rate
www.maximintegrated.com
Maxim Integrated │5

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