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PDF MAX1196 Data sheet ( Hoja de datos )
| Número de pieza | MAX1196 | |
| Descripción | Dual 8-Bit / 40Msps / 3V / Low-Power ADC with Internal Reference and Multiplexed Parallel Outputs | |
| Fabricantes | Maxim Integrated | |
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19-2600; Rev 0; 9/02
Dual 8-Bit, 40Msps, 3V, Low-Power ADC with
Internal Reference and Multiplexed Parallel Outputs
General Description
The MAX1196 is a 3V, dual 8-bit analog-to-digital con-
verter (ADC) featuring fully differential wideband track-
and-hold (T/H) inputs, driving two ADCs. The MAX1196
is optimized for low power, small size, and high-dynamic
performance for applications in imaging, instrumenta-
tion, and digital communications. This ADC operates
from a single 2.7V to 3.6V supply, consuming only
87mW while delivering a typical signal-to-noise and dis-
tortion (SINAD) of 48.4dB at an input frequency of
20MHz and a sampling rate of 40Msps. The T/H driven
input stages incorporate 400MHz (-3dB) input ampli-
fiers. The converters can also be operated with single-
ended inputs. In addition to low operating power, the
MAX1196 features a 3mA sleep mode as well as a
0.1µA power-down mode to conserve power during idle
periods.
An internal 2.048V precision bandgap reference sets
the full-scale range of the ADC. A flexible reference
structure allows the use of this internal or an externally
applied reference, if desired for applications requiring
increased accuracy or a different input voltage range.
The MAX1196 features parallel, multiplexed, CMOS-
compatible three-state outputs. The digital output format
can be set to two’s complement or straight offset binary
through a single control pin. The device provides for a
separate output power supply of 1.7V to 3.6V for flexible
interfacing. The MAX1196 is available in a 7mm × 7mm,
48-pin TQFP package, and is specified for the extended
industrial (-40°C to +85°C) temperature range.
Pin-compatible, nonmultiplexed higher speed versions of
the MAX1196 are also available. Refer to the MAX1198
data sheet for 100Msps, the MAX1197 data sheet for
60Msps, and the MAX1195 data sheet for 40Msps.
For a 10-bit, pin-compatible upgrade, refer to the
MAX1186 data sheet. With the N.C. pins of the
MAX1196 internally pulled down to ground, this ADC
becomes a drop-in replacement for the MAX1186.
Applications
Baseband I/Q Sampling
Multichannel IF Sampling
Ultrasound and Medical Imaging
Battery-Powered Instrumentation
WLAN, WWAN, WLL, MMDS Modems
Set-Top Boxes
VSAT Terminals
Functional Diagram appears at end of data sheet.
Features
o Single 2.7V to 3.6V Operation
o Excellent Dynamic Performance
48.4dB/44.7dB SINAD at fIN = 20MHz/200MHz
68.9dB/53dBc SFDR at fIN = 20MHz/200MHz
o -72dB Interchannel Crosstalk at fIN = 20MHz
o Low Power
87mW (Normal Operation)
9mW (Sleep Mode)
0.3µW (Shutdown Mode)
o 0.05dB Gain and ±0.05° Phase Matching
o Wide ±1VP-P Differential Analog Input Voltage
Range
o 400MHz -3dB Input Bandwidth
o On-Chip 2.048V Precision Bandgap Reference
o User-Selectable Output Format—Two’s
Complement or Offset Binary
o Pin-Compatible 8-Bit and 10-Bit Upgrades
Available
Ordering Information
PART
TEMP RANGE
MAX1196ECM
-40°C to +85°C
*EP = Exposed pad.
PIN-PACKAGE
48 TQFP-EP*
Pin Configuration
COM 1
VDD 2
GND 3
INA+ 4
INA- 5
VDD 6
GND 7
INB- 8
INB+ 9
GND 10
VDD 11
CLK 12
MAX1196
TQFP-EP
36 N.C.
35 N.C.
34 OGND
33 OVDD
32 OVDD
31 OGND
30 A/B
29 N.C.
28 N.C.
27 N.C.
26 N.C.
25 N.C.
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1 page  
Dual 8-Bit, 40Msps, 3V, Low-Power ADC with
Internal Reference and Multiplexed Parallel Outputs
ELECTRICAL CHARACTERISTICS (continued)
(VDD = OVDD = 3V, 0.1µF and 2.2µF capacitors from REFP, REFN, and COM to GND; REFOUT connected to REFIN through a 10kΩ
resistor, VIN = 2VP-P (differential with respect to COM), CL = 10pF at digital outputs (Note 5), fCLK = 40MHz, TA = TMIN to TMAX,
unless otherwise noted. ≥+25°C guaranteed by production test, <+25°C guaranteed by design and characterization. Typical values
are at TA = +25°C.)
PARAMETER
SYMBOL
Input Hysteresis
VHYST
Input Leakage
IIH
IIL
Input Capacitance
CIN
DIGITAL OUTPUTS (D0A/B–D7A/B, A/B)
Output Voltage Low
VOL
CONDITIONS
VIH = VDD = OVDD
VIL = 0
ISINK = -200µA
Output Voltage High
VOH
ISOURCE = 200µA
Three-State Leakage Current
Three-State Output Capacitance
POWER REQUIREMENTS
Analog Supply Voltage Range
Output Supply Voltage Range
Analog Supply Current
Output Supply Current
Analog Power Dissipation
Power-Supply Rejection
TIMING CHARACTERISTICS
CLK Rise to CHA Output Data
Valid
ILEAK
COUT
OE = OVDD
OE = OVDD
VDD
OVDD
IVDD
IOVDD
PDISS
PSRR
Operating, fINA&B = 20MHz at -1dB FS
applied to both channels
Sleep mode
Shutdown, clock idle, PD = OE = OVDD
Operating, fINA&B = 20MHz at -1dB FS
applied to both channels (Note 6)
Sleep mode
Shutdown, clock idle, PD = OE = OVDD
Operating, fINA&B = 20MHz at -1dB FS
applied to both channels
Sleep mode
Shutdown, clock idle, PD = OE = OVDD
Offset, VDD ±5%
Gain, VDD ±5%
tDOA CL = 20pF (Notes 1, 7)
MIN TYP MAX UNITS
0.15 V
±20
µA
±20
5 pF
0.2 V
OVDD -
0.2
V
±10 µA
5 pF
2.7 3 3.6 V
1.7 3 3.6 V
29 36
3
0.1 20
mA
µA
8 mA
3
µA
3 10
87 108
mW
9
0.3 60
µW
±3
mV/V
±3
6 8.25 ns
CLK Fall to CHB Output Data
Valid
tDOB CL = 20pF (Notes 1, 7)
6 8.25 ns
Clock Rise/Fall to A/B Rise/Fall
Time
OE Fall to Output Enable Time
OE Rise to Output Disable Time
CLK Pulse Width High
tDA/B
tENABLE
tDISABLE
tCH Clock period: 25ns (Note 7)
6
5
5
12.5
±1.5
ns
ns
ns
ns
_______________________________________________________________________________________ 5
5 Page 
Dual 8-Bit, 40Msps, 3V, Low-Power ADC with
Internal Reference and Multiplexed Parallel Outputs
Pin Description (continued)
PIN NAME
FUNCTION
T/B selects the ADC digital output format.
17 T/B High: Two’s complement.
Low: Straight offset binary.
Sleep Mode Input.
18 SLEEP High: Deactivates the two ADCs, but leaves the reference bias circuit active.
Low: Normal operation.
High-Active Power-Down Input.
19 PD High: Power-down mode
Low: Normal operation
20
21–29, 35, 36
30
31, 34
32, 33
37
38
39
40
41
42
43
44
45
46
47
48
Low-Active Output Enable Input.
OE High: Digital outputs disabled
Low: Digital outputs enabled
N.C. No Connection. Do not connect.
A/B
OGND
A/B Data Indicator. This digital output indicates CHA data (A/B = 1) or CHB data (A/B = 0) to be
present on the output. A/B follows the external clock signal with typically 6ns delay.
Output-Driver Ground
OVDD
Output-Driver Supply Voltage. Bypass to OGND with a capacitor combination of 2.2µF in parallel with
0.1µF.
D0A/B
Three-State Digital Output, Bit 0. Depending on status of A/B, output data reflects channel A or
channel B data.
D1A/B
Three-State Digital Output, Bit 1. Depending on status of A/B, output data reflects channel A or
channel B data.
D2A/B
Three-State Digital Output, Bit 2. Depending on status of A/B, output data reflects channel A or
channel B data.
D3A/B Three-State Digital Output, Bit 3. Depending on status of A/B, output data reflects channel A or
channel B data.
D4A/B Three-State Digital Output, Bit 4. Depending on status of A/B, output data reflects channel A or
channel B data.
D5A/B Three-State Digital Output, Bit 5. Depending on status of A/B, output data reflects channel A or
channel B data.
D6A/B Three-State Digital Output, Bit 6. Depending on status of A/B, output data reflects channel A or
channel B data.
D7A/B Three-State Digital Output, Bit 7 (MSB). Depending on status of A/B, output data reflects channel A or
channel B data.
REFOUT Internal Reference Voltage Output. Can be connected to REFIN through a resistor or a resistor-divider.
REFIN Reference Input. VREFIN = 2 × (VREFP - VREFN). Bypass to GND with a ≥0.1µF capacitor.
REFP Positive Reference I/O. Conversion range is ±(VREFP - VREFN). Bypass to GND with a ≥0.1µF capacitor.
REFN
Negative Reference I/O. Conversion range is ±(VREFP - VREFN). Bypass to GND with a ≥0.1µF
capacitor.
______________________________________________________________________________________ 11
11 Page | ||
| Páginas | Total 23 Páginas | |
| PDF Descargar | [ Datasheet MAX1196.PDF ] | |
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