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PDF MAX116 Data sheet ( Hoja de datos )

Número de pieza MAX116
Descripción 2x4-Channel / Simultaneous-Sampling 12-Bit ADCs
Fabricantes Maxim Integrated 
Logotipo Maxim Integrated Logotipo



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No Preview Available ! MAX116 Hoja de datos, Descripción, Manual

19-1928; Rev 0; 1/01
EVAALVUAAILTAIOBNLEKIT
2x4-Channel, Simultaneous-Sampling
12-Bit ADCs
________________General Description
The MAX115/MAX116 are high-speed, multichannel,
12-bit data-acquisition systems (DAS) with simultane-
ous track/holds (T/Hs). These devices contain a 12-bit,
2µs, successive-approximation analog-to-digital con-
verter (ADC), a +2.5V reference, a buffered reference
input, and a bank of four simultaneous-sampling T/H
amplifiers that preserve the relative phase information
of the sampled inputs. The MAX115/MAX116 have two
multiplexed inputs for each T/H, allowing a total of eight
inputs. In addition, the converter is overvoltage tolerant
to ±17V. A fault condition on any channel will not dam-
age the IC. Available input ranges are ±5V (MAX115)
and ±2.5V (MAX116).
The parallel interface’s data access and bus release
timing specifications are compatible with most popular
digital signal processors and 16-bit/32-bit microproces-
sors. The MAX115/MAX116 conversion results can be
accessed without resorting to wait-states.
________________________Applications
Multiphase Motor Control
Power-Grid Synchronization
Power-Factor Monitoring
Digital Signal Processing
Vibration and Waveform Analysis
____________________________Features
o Four Simultaneous-Sampling T/H Amplifiers with
Two Multiplexed Inputs (Eight Single-Ended
Inputs Total)
o 2µs Conversion Time per Channel
o Throughput: 390ksps (1 Channel)
218ksps (2 Channels)
152ksps (3 Channels)
116ksps (4 Channels)
o Input Range: ± 5V (MAX115)
± 2.5V (MAX116)
o Fault-Protected Input Multiplexer (±17V)
o Internal +2.5V or External Reference Operation
o Programmable On-Board Sequencer
o High-Speed Parallel DSP Interface
o Internal 10MHz Clock
Ordering Information
PART
MAX115CAX
MAX115EAX
MAX116CAX
MAX116EAX
TEMP. RANGE
0°C to +70°C
-40°C to +85°C
0°C to +70°C
-40°C to +85°C
PIN-PACKAGE
36 SSOP
36 SSOP
36 SSOP
36 SSOP
Pin Configuration
Typical Operating Circuit
TOP VIEW
CH2B 1
CH2A 2
CH1B 3
CH1A 4
AVDD 5
REFIN 6
REFOUT 7
AGND 8
D11 (MSB) 9
D10 10
D9 11
D8 12
D7 13
D6 14
D5 15
D4 16
DVDD 17
DGND 18
MAX115
MAX116
SSOP
36 AGND
35 CH3B
34 CH3A
33 CH4B
32 CH4A
31 AVSS
30 INT
29 CONVST
28 RD
27 WR
26 CS
25 CLK
24 A0
23 A1
22 D0/A2 (LSB)
21 D1/A3
20 D2
19 D3
+5V
0.1µF
0.1µF
-5V
0.1µF
CH1A
CH1B
CH2A
CH2B
CH3A
CH3B
CH4A
CH4B
AVDD
AGND
AVSS
REFIN
MAX115
MAX116
A0
A1
D0/A2
D1/A3
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
DVDD
4.7µF
REFOUT
DGND
CLK CONVST INT CS RD WR
16MHz
CONTROL INTERFACE
+5V
0.1µF
________________________________________________________________ Maxim Integrated Products 1
For price, delivery, and to place orders, please contact Maxim Distribution at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.

1 page




MAX116 pdf
2x4-Channel, Simultaneous-Sampling
12-Bit ADCs
TIMING CHARACTERISTICS (continued)
(See Figure 4, AVDD = +5V, AVSS = -5V, DVDD = +5V, AGND = DGND = 0, TA = TMIN to TMAX, Typical values are at TA = +25°C,
unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
Mode 1, Channel 1
2
Conversion Time
tCONV
Mode 2, Channel 2
Mode 3, Channel 3
4
µs
6
Mode 4, Channel 4
8
Mode 1, Channel 1
390
Conversion Rate
Mode 2, Channel 2
Mode 3, Channel 3
218
ksps
152
Mode 4, Channel 4
116
Startup Time
Exiting shutdown
20 ms
Note 1: AVDD = +5V, AVSS = -5V, DVDD = +5V, VREFIN = 2.500V (external), VIN = ±5V (MAX115) or ±2.5V (MAX116).
Note 2: Integral nonlinearity is the analog value’s deviation at any code from its theoretical value after the full-scale range and
offset have been calibrated.
Note 3: CLK synchronized with CONVST.
Note 4: fIN = 10.06kHz, VIN = ±5V (MAX115) or ±2.5V (MAX116).
Note 5: First five harmonics.
Note 6: All inputs except CH1A driven with ±5V (MAX115) or ±2.5V (MAX116) 10.06kHz signal, CH1A connected to AGND and digi-
tized.
Note 7: AVDD = DVDD = +5V, AVSS = -5V, VIN = 0V (all channels).
Note 8: Temperature drift is defined as the change in output voltage from +25°C to TMIN or TMAX. It is calculated as
TC = [REFOUT/REFOUT] / T.
Note 9: See Figure 2.
Note 10: Defined as the change in positive full scale caused by a ±5% variation in the nominal supply voltage. Tested with one input
at full scale and all others at AGND. VREFIN = +2.5V (internal).
Note 11: Tested with all inputs connected to AGND. VREFIN = +2.5V (internal).
Note 12: The data access time is defined as the time required for an output to cross +0.8V or +2.0V. It is measured using the circuit
of Figure 1. The measured number is then extrapolated back to determine the value with a 25pF load.
Note 13: The bus relinquish time is derived from the measured time taken for the data outputs to change +0.5V when loaded with the
circuit of Figure 1. The measured number is then extrapolated back to remove the effects of charging and discharging the
120pF capacitor. The time given is the part’s true bus relinquish time, which is independent of the external bus loading capac-
itance.
_______________________________________________________________________________________ 5

5 Page





MAX116 arduino
2x4-Channel, Simultaneous-Sampling
12-Bit ADCs
OUTPUT CODE
TO DAC
MAX115
MAX116
REFOUT 7 (2.5V)
4.7µF
AV = 1
REFIN 6 (2.5V)
OUT
MAX6325
10k
2.5V
Figure 7. External Reference
011 . . . 111
011 . . . 110
000 . . . 010
000 . . . 001
000 . . . 000
111 . . . 111
111 . . . 110
111 . . . 101
100 . . . 001
100 . . . 000
- FS ZERO
INPUT VOLTAGE (LSB)
MAX115: FS = 2 x VREFOUT, 1LSB = 4VREFOUT
4096
MAX116: FS = VREFOUT, 1LSB = 2VREFOUT
4096
Figure 8. Bipolar Transfer Function
+FS - 1LSB
Internal and External Reference
The MAX115/MAX116 can be used with an internal or
external reference voltage. An external +2.5 reference
can be connected directly at REFIN. An internal buffer
with a gain of +1 provides +2.5V at REFOUT.
Internal Reference
The full-scale range with the internal reference is ±5V
for the MAX115 and ±2.5V for the MAX116. Bypass
REFIN with a 0.1µF capacitor to AGND, and bypass the
REFOUT pin with a 4.7µF (min) capacitor to AGND
(Figure 6). The maximum value to compensate the ref-
erence buffer is 22µF. Larger values are acceptable if
low-ESR capacitors are used.
External Reference
For operation over a wide temperature range, an exter-
nal +2.5V reference with tighter specifications improves
accuracy. The MAX6325 is an excellent choice
to match the MAX115/MAX116 accuracy over the
commercial and extended temperature ranges with a
1ppm/°C (max) temperature drift. Connect an external
reference at REFIN as shown in Figure 7. The minimum
impedance is 7kfor DC currents in both normal oper-
ation and shutdown. Bypass REFOUT with a 4.7µF low-
ESR capacitor.
Power-On Reset
When power is first applied, the internal power-on reset
(POR) circuitry activates the MAX115/MAX116 with INT
= high, ready to convert. The default conversion mode
is Input Mux A/Single Channel Conversion. See the
Programming Modes section if other configurations are
desired.
After the power supplies have been stabilized, the reset
time is 5µs. No conversions should be performed
during this phase. At power-up, data-in memory is
undefined.
Software Power-Down
Software power-down is activated by setting bit A3 of
the control word high (Table 1). It is asserted after the
WR or CS rising edge, at which point the ADC immedi-
ately powers down to a low quiescent-current state.
IAVDD and IAVSS drop to less than 1µA (typ), and IDVDD
drops to 13µA (typ). The ADC circuitry and reference
buffer are turned off, but the digital interface and the
reference remain active for fast power-up recovery.
Wake up the MAX115/MAX116 by writing a control
word (A0–A3, Table 1). The bidirectional interface inter-
prets a logic zero at A3 as the start signal, and powers
up in the mode selected by A0, A1, and A2. The refer-
ence buffer’s settling time and the bypass capacitor’s
value dominate the power-up delay. With the recom-
mended 4.7µF at REFOUT, the power-up delay is typi-
cally 20ms.
Transfer Function
The MAX115/MAX116 have bipolar input ranges. Figure
8 shows the bipolar/output transfer function. Code tran-
sitions occur at successive-integer least significant bit
______________________________________________________________________________________ 11

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