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PDF M95160 Data sheet ( Hoja de datos )

Número de pieza M95160
Descripción 64/32/16/8 Kbit Serial SPI Bus EEPROM With High Speed Clock
Fabricantes ST Microelectronics 
Logotipo ST Microelectronics Logotipo



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No Preview Available ! M95160 Hoja de datos, Descripción, Manual

M95160
M95080
16 Kbit and 8 Kbit serial SPI bus EEPROM
with high speed clock
Features
www.DataSheet4U.com
Compatible with SPI bus serial interface
(positive clock SPI modes)
Single supply voltage:
– 4.5 V to 5.5 V for M95xxx
– 2.5 V to 5.5 V for M95xxx-W
– 1.8 V to 5.5 V for M95xxx-R
High Speed: 10 MHz
Status Register
Hardware Protection of the Status Register
Byte and page write (up to 32 bytes)
Self-timed programming cycle
Adjustable size read-only EEPROM area
Enhanced ESD protection
More than 1 million Erase/Write cycles
More than 40-year data retention
Packages
– ECOPACK® (RoHS compliant)
Table 1. Device summary
Reference
Part number
M95160
M95160
M95160-W
M95160-R
M95080
M95080
M95080-W
M95080-R
Figure 1. Packages
SO8 (MN)
150 mil width
TSSOP8 (DW)
169 mil width
UFDFPN8 (MB)
2 x 3 mm (MLP)
May 2007
Rev 6
1/45
www.st.com
1

1 page




M95160 pdf
M95160, M95080
List of figures
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
8-pin package connections (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Bus master and memory devices on the SPI bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
SPI modes supported . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Write Enable (WREN) sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Write Disable (WRDI) sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Read Status Register (RDSR) sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Write Status Register (WRSR) sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Read from Memory Array (READ) sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Byte Write (WRITE) sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Page Write (WRITE) sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
AC measurement I/O waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Serial input timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Hold timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Output timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
SO8 narrow – 8 lead Plastic Small Outline, 150 mils body width, package outline . . . . . . 38
UFDFPN8 (MLP8) 8-lead Ultra thin Fine pitch Dual Flat Package No lead
2 x 3 mm², package outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
TSSOP8 – 8 lead Thin Shrink Small Outline, package outline . . . . . . . . . . . . . . . . . . . . . . 40
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M95160 arduino
M95160, M95080
Connecting to the SPI bus
3.1 SPI modes
These devices can be driven by a microcontroller with its SPI peripheral running in either of
the two following modes:
CPOL=0, CPHA=0
CPOL=1, CPHA=1
For these two modes, input data is latched in on the rising edge of Serial Clock (C), and
output data is available from the falling edge of Serial Clock (C).
The difference between the two modes, as shown in Figure 5., is the clock polarity when the
bus master is in Stand-by mode and not transferring data:
C remains at 0 for (CPOL=0, CPHA=0)
C remains at 1 for (CPOL=1, CPHA=1)
Figure 5. SPI modes supported
CPOL CPHA
0 0C
1 1C
D MSB
Q MSB
AI01438B
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