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PDF M74HCT138 Data sheet ( Hoja de datos )

Número de pieza M74HCT138
Descripción 3 TO 8 LINE DECODER INVERTING
Fabricantes ST Microelectronics 
Logotipo ST Microelectronics Logotipo



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No Preview Available ! M74HCT138 Hoja de datos, Descripción, Manual

M54HCT138
M74HCT138
3 TO 8 LINE DECODER (INVERTING)
. HIGH SPEED
tPD = 16 ns (TYP.) at VCC = 5 V
. LOW POWER DISSIPATION
ICC = 4 µA AT TA = 25 °C
. OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
. BALANCED PROPAGATION DELAYS
tPLH = tPHL
. SYMMETRICAL OUTPUT IMPEDANCE
|IOH| = IOL
. COMPATIBLE WITH TTL OUTPUTS
VIH = 2V (MIN.) VIL = 0.8V (MAX)
. PIN AND FUNCTION COMPATIBLE
WITH 54/74LS138
B1R
(Plastic Package)
F1R
(Ceramic Package)
M 1R
(Micro Package)
C1R
(Chip Carrier)
DESCRIPTION
The M54/74HC138 is a high speed CMOS 3 TO 8
LINE DECODER fabricated in silicon gate C2MOS
technology. It has the same high speed perform-
ance of LSTTL combined with true CMOSlow power
consumption. If the device is enabled, 3 binary se-
lect inputs (A, B and C) determine which one of the
outputs will go low. If enable input G1 is held low or
either G2A or G2B is held high, the decoding func-
tion is inhibited and all the 8 outputs go high. Three
enable inputs are provided to ease cascade connec-
tion and application of address decoders for mem-
ory systems. All inputs are equipped with protection
circuits against static discharge and tran- sient ex-
cess voltage.This integrated circuit has input and
output characteristics that are fully compatible with
54/74 LSTTL logic families. M54/74HCT devices
are designed to directly interface HSC2MOS sys-
tems with TTL and NMOS components. They are
also plug in replacements for LSTTL devices giving
a reduction of power consumption.
ORDER CODES :
M54HCT138F1R M74HCT138M1R
M74HCT138B1R M74HCT138C1R
PIN CONNECTIONS (top view)
INPUT AND OUTPUT EQUIVALENT CIRCUIT
February 1993
NC =
No Internal
Connection
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M74HCT138 pdf
M54/M74HCT138
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6 ns)
Symbol
Parameter
Test Conditions
VCC
(V)
TA = 25 oC
54HC and 74HC
Min. Typ. Max.
Value
-40 to 85 oC
74HC
Min. Max.
-55 to 125 oC
54HC
Min. Max.
Unit
tTLH Output Transition 4.5
tTHL Time
8 15 19 22 ns
tPLH Propagation
tPHL Delay Time
(A, B, C - Y)
4.5
17 30 38 45
ns
tPLH Propagation
tPHL Delay Time
(G1 - Y)
4.5
16 30 38 45
ns
tPLH Propagation
tPHL Delay Time
(G2 - Y)
4.5
19 30 38 45
ns
CIN Input Capacitance
5 10 10 10 pF
CPD (*) Power Dissipation
Capacitance
52
pF
(*) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load.
(Refer to Test Circuit). Average operting current can be obtained by the following equation. ICC(opr) = CPD VCC fIN + ICC
SWITCHING CHARACTERISTICS TEST WAVEFORM
TEST CIRCUIT ICC (Opr.)
INPUT WAVEFORM IS THE SAME
AS THAT IN CASE OF SWITCHING
CHARACTERISTICS TEST.
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