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PDF M69897VP Data sheet ( Hoja de datos )

Número de pieza M69897VP
Descripción 16:1 2.488 Gbps Multiplexer
Fabricantes Mitsubishi 
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Preliminary
MITSUBISHI SEMICONDUCTOR <SOI/CMOS>
M69897VP
16:1 2.488 Gbps Multiplexer
DESCRIPTION
The M69897VP multiplexer chip is an integrated serialization SONET OC-48 (2.488 Gbps) interface
device. The chip performs parallel-to-serial functions in conformance with SONET/SDH transmission
standards. The device is suitable for SONET-based ATM applications.
The merits of SOI (Silicon-On-Insulator) technology, such as low voltage operation, low substrate noise
and good compatibility with standard CMOS technology, are fully utilized in the chip design to
achieve low jitter and low power operation and small package outline of 64-pin PQFP.
FEATURES
- Single 1.8 V power supply
- Supports 2.488 Gbps (OC-48, STM-16)
- 16-bit single-ended PECL interface
- On-chip high-frequency PLL for clock generation
- 155.52 MHz reference frequency
- Low power consumption
- Available in 64 PQFP
- Parity check function
APPLICATIONS
- SONET/SDH systems
- Fiber optic systems
- High-speed back plane interconnect and point-to-point data links
PARITYI
PARITY
CHECK
PARIERRO
PDI[15:0]
PCLKOP/
PCLKON
SCLKIP/
SCLKIN
PCLKIP/
PCLKIN
SELPLL
16
155.52 Mbps
16:1 PARALLEL
TO SERIAL
2
155.52 MHz
TIMING
GENERATOR
D-FF
2
2.488 Gbps
2
2.488 GHz
2
2.488 GHz
2.488 GHz
2
155.52 MHz
PLL
2.488 GHz
2
SDOP/SDON
SCLKOP/
SCLKON
LPF_EXT1/
LPF_EXT2
Figure 1 Functional Block Diagram
1 MITSUBISHI ELECTRIC December 2000

1 page




M69897VP pdf
PARIERRO
M69897VP
50ohm
Figure 7 Single-Ended PECL Output DC Termination
PARIERRO
0.1 µF
R1
M69897VP
330ohm
R2
R1xR2/(R1+R2) = 50ohm
Figure 8 Single-Ended PECL Output AC Termination
SCLKOP/
SDOP/
PCLKOP
SCLKON/
SDON/
PCLKON
M69897VP
50ohm
50ohm
Figure 9 Differential PECL Output DC Termination
5 MITSUBISHI ELECTRIC December 2000

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