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Número de pieza | IRLR120N | |
Descripción | N-channel power MOSFET / 100V / 10A | |
Fabricantes | TRF | |
Logotipo | ||
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No Preview Available ! l Surface Mount (IRLR120N)
l Straight Lead (IRLU120N)
l Advanced Process Technology
l Fast Switching
l Fully Avalanche Rated
Description
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve the
lowest possible on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power
MOSFETs are well known for, provides the designer
with an extremely efficient device for use in a wide
variety of applications.
The D-PAK is designed for surface mounting using
vapor phase, infrared, or wave soldering techniques.
The straight lead version (IRFU series) is for through-
hole mounting applications. Power dissipation levels
up to 1.5 watts are possible in typical surface mount
applications.
Absolute Maximum Ratings
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
TSTG
Parameter
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
G
Thermal Resistance
RθJC
RθJA
RθJA
www.irf.com
Parameter
Junction-to-Case
Junction-to-Ambient (PCB mount) **
Junction-to-Ambient
PD - 91541B
IRLR/U120N
HEXFET® Power MOSFET
D
VDSS = 100V
RDS(on) = 0.185Ω
ID = 10A
S
D -P A K
T O -2 52 A A
I-P A K
TO -251AA
Max.
10
7.0
35
48
0.32
± 16
85
6.0
4.8
5.0
-55 to + 175
300 (1.6mm from case )
Units
A
W
W/°C
V
mJ
A
mJ
V/ns
°C
Typ.
–––
–––
–––
Max.
3.1
50
110
Units
°C/W
1
5/11/98
1 page IRLR/U120N
10
8
6
4
2
0A
25 50 75 100 125 150 175
TC , C ase Tem perature (°C )
Fig 9. Maximum Drain Current Vs.
Case Temperature
10
VDS
VGS
RG
RD
D.U.T.
5.0V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
+-VDD
Fig 10a. Switching Time Test Circuit
VDS
90%
10%
VGS
td(on) tr
td(off) tf
Fig 10b. Switching Time Waveforms
D = 0.50
1
0.20
0.10
0.05
0.02
0.1 0.01
0.01
0.00001
SINGLE PULSE
(THERMAL RESPONSE)
PDM
t1
t2
Notes:
1. Duty factor D = t1 / t 2
2. Peak TJ = P DM x ZthJC + TC
0.0001
0.001
0.01
t1, Rectangular Pulse Duration (sec)
0.1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
www.irf.com
5
5 Page |
Páginas | Total 10 Páginas | |
PDF Descargar | [ Datasheet IRLR120N.PDF ] |
Número de pieza | Descripción | Fabricantes |
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