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PDF M37735M4B Data sheet ( Hoja de datos )

Número de pieza M37735M4B
Descripción SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Fabricantes Mitsubishi 
Logotipo Mitsubishi Logotipo



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PRELIMINARYNSootimcee: pTahriasmisentroict alimfinitsalasrpeescuifbicjeactitotno. change.
MITSUBISHI MICROCOMPUTERS
M37735M4BXXXFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
DESCRIPTION
The M37735M4BXXXFP is a single-chip microcomputer using the
7700 Family core. This single-chip microcomputer has a CPU and a
bus interface unit. The CPU is a 16-bit parallel processor that can be
an 8-bit parallel processor, and the bus interface unit enhances the
memory access efficiency to execute instructions fast. This
microcomputer also includes a 32 kHz oscillation circuit, in addition
to the ROM, RAM, multiple-function timers, serial I/O, A-D converter,
and so on.
FEATURES
qNumber of basic instructions .................................................. 103
qMemory size ROM ................................................. 32 Kbytes
RAM ................................................ 2048 bytes
qInstruction execution time
The fastest instruction at 25 MHz frequency ...................... 160 ns
qSingle power supply ...................................................... 5 V ± 10%
qLow power dissipation (at 25 MHz frequency)
............................................47.5 mW (Typ.)
qInterrupts ............................................................ 19 types, 7 levels
qMultiple-function 16-bit timer ................................................. 5 + 3
qSerial I/O (UART or clock synchronous) ..................................... 3
q10-bit A-D converter ............................................ 8-channel inputs
q12-bit watchdog timer
qProgrammable input/output
(ports P0, P1, P2, P3, P4, P5, P6, P7, P8) ............................... 68
qClock generating circuit ........................................ 2 circuits built-in
APPLICATION
Control devices for general commercial equipment such as office
automation, office equipment, and so on.
Control devices for general industrial equipment such as
communication equipment, and so on.
PIN CONFIGURATION (TOP VIEW)
P83/TXD0
P82/RXD0/CLKS0
P81/CLK0
P80/CTS0/RTS0/CLKS1
VCC
AVCC
VREF
AVSS
VSS
P77/AN7/XcIN
P76/AN6/XcOUT
P75/AN5/ADTRG/TxD2
P74/AN4/RxD2
P73/AN3/CLK2
P72/AN2/CTS2
P71/AN1
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
M37735M4BXXXFP
40 P24/A4/D4
39 P25/A5/D5
38 P26/A6/D6
37 P27/A7/D7
36 P30/WEL
35 P31/WEH
34 P32/ALE
33 P33/HLDA
32 Vss
31 E/RDE
30 XOUT
29 XIN
28 RESET
27 CNVSS
26 BYTE
25 P40/HOLD
Outline 80P6N-A
1

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M37735M4B pdf
PRELIMINARYNSootimcee: pTahriasmisentroict alimfinitsalasrpeescuifbicjeactitotno. change.
MITSUBISHI MICROCOMPUTERS
M37735M4BXXXFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
BASIC FUNCTION BLOCKS
The M37735M4BXXXFP has the same fuanctions as the
M37735MHBXXXFP except for the memory allocation and the ROM
area modification function.
Refer to the section on the M37735MHBXXXFP.
MEMORY
The memory map is shown in Figure 1. The address space has a
capacity of 16 Mbytes and is allocated to addresses from 016 to
FFFFFF16. The address space is divided by 64-Kbyte unit called bank.
The banks are numbered from 016 to FF16.
However, banks 1016 – FF16 of the 7735 group cannot be accessed.
Built-in ROM, RAM and control registers for internal peripheral devices
are assigned to bank 016.
The 32-Kbyte area from addresses 800016 to FFFF16 is the built-in
ROM. Addresses FFD616 to FFFF16 are the RESET and interrupt
vector addresses and contain the interrupt vectors. Refer to the section
on interrupts for details.
The 2048-byte area allocated to addresses from 8016 to 87F16 is the
built-in RAM. In addition to storing data, the RAM is used as stack
during a subroutine call or interrupts.
Peripheral devices such as I/O ports, A-D converter, serial I/O, timer,
and interrupt control registers are allocated to addresses from 016 to
7F16.
Additionally, the internal ROM area can be modified by software. Refer
to the section on ROM area modification function for details.
A 256-byte direct page area can be allocated anywhere in bank 016
by using the direct page register (DPR). In the direct page addressing
mode, the memory in the direct page area can be accessed with two
words. Hence program steps can be reduced.
Bank 016
00000016
00FFFF16
01000016
00000016
00007F16
00008016
00087F16
Internal RAM
2048 bytes
00000016
Internal peripheral
devices
control registers
refer to Fig. 2 for
detail information
00007F16
Bank 116
01FFFF16
Bank FE16
FE000016
Bank FF16
FEFFFF16
FF000016
FFFFFF16
00800016
Internal ROM
32 Kbytes
00FFD616
00FFFF16
Interrupt vector table
00FFD616 A-D/UART2 trans./rece.
UART1 transmission
UART1 receive
UART0 transmission
UART0 receive
Timer B2
Timer B1
Timer B0
Timer A4
Timer A3
Timer A2
Timer A1
Timer A0
INT2/Key input
INT1
INT0
Watchdog timer
DBC
BRK instruction
00FFFE16
Zero divide
RESET
Notes 1. Internal ROM area can be modified. (Refer to the section on ROM area modification function.)
2. Banks 1016 – FF16 cannot be accessed in the 7735 group.
Fig. 1 Memory map
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M37735M4B arduino
PRELIMINARYNSootimcee: pTahriasmisentroict alimfinitsalasrpeescuifbicjeactitotno. change.
MITSUBISHI MICROCOMPUTERS
M37735M4BXXXFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
ELECTRICAL CHARACTERISTICS (Vcc = 5 V, Vss = 0 V, Ta = –20 to 85 °C, unless otherwise noted)
Symbol
Parameter
Test conditions
VCC = 5 V,
f(XIN) = 25 MHz (square waveform),
f(f2) = 12.5 MHz,
f(XCIN) = 32.768 kHz,
in operating (Note 1)
VCC = 5 V,
f(XIN) = 25 MHz (square waveform),
(f(f2) = 1.5625 MHz),
f(XCIN) = Stopped,
in operating (Note 1)
Limits
Min.
Typ.
Max.
Unit
9.5 19 mA
1.3 2.6 mA
In single-chip
VCC = 5V,
ICC
Power source mode, output pins f(XIN) = 25 MHz (square waveform),
current
are open, and
f(XCIN) = 32.768 kHz,
other pins are VSS. when a WIT instruction is executed (Note 2)
10 20 mA
VCC = 5 V,
f(XIN) : Stopped,
f(XCIN) : 32.768 kHz,
in operating (Note 3)
50 100 µA
VCC = 5 V,
f(XIN) : Stopped,
f(XCIN) : 32.768 kHz,
when a WIT instruction is executed (Note 4)
Ta = 25 °C,
when clock is stopped
Ta = 85 °C,
when clock is stopped
5 10 µA
1 µA
20 µA
Notes 1. This applies when the main clock external input selection bit = “1”, the main clock division selection bit = “0”, and the signal output stop
bit = “1”.
2. This applies when the main clock external input selection bit = “1” and the system clock stop bit at wait state = “1”.
3. This applies when CPU and the clock timer are operating with the sub clock (32.768 kHz) selected as the system clock.
4. This applies when the XCOUT drivability selection bit = “0” and the system clock stop bit at wait state = “1”.
A–D CONVERTER CHARACTERISTICS
(VCC = AVCC = 5 V, VSS = AVSS = 0 V, Ta = –20 to 85 °C, f(XIN) = 25 MHz (Note), unless otherwise noted)
Symbol
Parameter
Test conditions
— Resolution
VREF = VCC
— Absolute accuracy
VREF = VCC
RLADDER
Ladder resistance
VREF = VCC
tCONV
Conversion time
VREF
Reference voltage
VIA Analog input voltage
Note. This applies when the main clock division selection bit = “0” and f(f2) = 12.5 MHz.
Min.
10
9.44
2
0
Limits
Typ.
Max.
10
±3
25
VCC
VREF
Unit
Bits
LSB
k
µs
V
V
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