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PDF M30625FGGP Data sheet ( Hoja de datos )
| Número de pieza | M30625FGGP | |
| Descripción | SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER | |
| Fabricantes | Mitsubishi | |
| Logotipo |  |
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Description
Mitsubishi microcomputers
M16C / 62 Group (80-pin)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Description
The M16C/62 (80-pin version) group of single-chip microcomputers are built using the high-performance
silicon gate CMOS process using a M16C/60 Series CPU core and are packaged in a 80-pin plastic molded
QFP. These single-chip microcomputers operate using sophisticated instructions featuring a high level of
instruction efficiency. With 1M bytes of address space, they are capable of executing instructions at high
speed. They also feature a built-in multiplier and DMAC, making them ideal for controlling office, communi-
cations, industrial equipment, and other high-speed processing applications.
The M16C/62 (80-pin version) group includes a wide range of products with different internal memory types
and sizes and various package types.
Features
• Memory capacity .................................. ROM (See Figure 1.1.4. ROM Expansion)
RAM 3K to 20K bytes
• Shortest instruction execution time ...... 62.5ns (f(XIN)=16MHZ, VCC=5V)
100ns (f(XIN)=10MHZ, VCC=3V, with software one-wait) : Mask ROM, flash memory 5V version
142.9ns (f(XIN)=7MHZ, VCC=3V, with software one-wait) : One-time PROM version
• Supply voltage ..................................... 4.2 to 5.5V (f(XIN)=16MHZ, without software wait) : Mask ROM, flash memory 5V version
4.5 to 5.5V (f(XIN)=16MHZ, without software wait) : One-time PROM version
2.7 to 5.5V (f(XIN)=10MHZ with software one-wait) : Mask ROM, flash memory 5V version
2.7 to 5.5V (f(XIN)=7MHZ with software one-wait) : One-time PROM version
• Low power consumption ...................... 25.5mW ( f(XIN)=10MHZ, with software one-wait, VCC = 3V)
• Interrupts .............................................. 25 internal and 5 external interrupt sources, 4 software
interrupt sources; 7 levels (including key input interrupt)
• Multifunction 16-bit timer ...................... 5 output timers + 6 input timers (3 for timer function only)
• Serial I/O .............................................. 5 channels (2 for UART or clock synchronous, 1 for UART, 2 for clock synchronous)
• DMAC .................................................. 2 channels (trigger: 24 sources)
• A-D converter ....................................... 10 bits X 8 channels (Expandable up to 10 channels)
• D-A converter ....................................... 8 bits X 2 channels
• CRC calculation circuit ......................... 1 circuit
• Watchdog timer .................................... 1 line
• Programmable I/O ............................... 70 lines
_______
• Input port .............................................. 1 line (P85 shared with NMI pin)
• Clock generating circuit ....................... 2 built-in clock generation circuits
(built-in feedback resistor, and external ceramic or quartz oscillator)
Note: Memory expansion mode and microprocessor mode are not supported.
Applications
Audio, cameras, office equipment, communications equipment, portable equipment
------Table of Contents------
About the M16C/62 (80-pin version) group ..... 7
Central Processing Unit (CPU) ..................... 11
Reset ............................................................. 14
Processor Mode ............................................ 21
Clock Generating Circuit ............................... 26
Protection ...................................................... 35
Interrupts ....................................................... 36
Watchdog Timer ............................................ 56
DMAC ........................................................... 58
Timer ............................................................. 68
Serial I/O ....................................................... 86
A-D Converter ............................................. 126
D-A Converter ............................................. 136
CRC Calculation Circuit .............................. 138
Programmable I/O Ports ............................. 140
Electric Characteristics ............................... 154
Flash memory version ................................. 192
1
1 page  
Description
Mitsubishi microcomputers
M16C / 62 Group (80-pin)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Mitsubishi plans to release the following products in the M16C/62 (80-pin version) group:
(1) Support for mask ROM version, one-time PROM version and flash memory version
(2) ROM capacity
(3) Package
80P6S-A : Plastic molded QFP (mask ROM, one-time PROM, and flash memory versions)
ROM Size
(Byte)
External
ROM
256K M30625MG-XXXGP
128K
96K
80K
64K
32K
M30623MC-XXXGP
M30621MC-XXXGP
M30621MA-XXXGP
M30623MA-XXXGP
M30621ECGP
M30623M8-XXXGP
M30621M8-XXXGP
M30623M4-XXXGP
Mask ROM version One-time PROM version
M30625FGGP
M30625FGLGP
Flash memory version
External ROM version
Figure 1.1.3. ROM expansion
The M16C/62 (80-pin version) group products currently supported are listed in Table 1.1.2.
Table 1.1.2. M16C/62 (80-pin version) group
Type No
M30623M4-XXXGP
M30623M8-XXXGP
M30623MA-XXXGP
M30623MC-XXXGP
M30621M8-XXXGP
M30621MA-XXXGP
M30621MC-XXXGP
M30625MG-XXXGP
M30621ECGP
M30625FGGP
M30625FGLGP
ROM capacity
32 Kbytes
64 Kbytes
96 Kbytes
128 Kbytes
64 Kbytes
96 Kbytes
128 Kbytes
256 Kbytes
128 Kbytes
256 Kbytes
256 Kbytes
RAM capacity
3 Kbytes
4 Kbytes
5 Kbytes
5 Kbytes
10 Kbytes
10 Kbytes
10 Kbytes
20 Kbytes
10 Kbytes
20 Kbytes
20 Kbytes
Package type
80P6S-A
80P6S-A
80P6S-A
80P6S-A
80P6S-A
80P6S-A
80P6S-A
80P6S-A
80P6S-A
80P6S-A
80P6S-A
As of December 1999
Remarks
mask ROM version
One-time PROM version
Flash memory 5V version
Flash memory 3V version
5
5 Page 
CPU
Mitsubishi microcomputers
M16C / 62 Group (80-pin)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Central Processing Unit (CPU)
The CPU has a total of 13 registers shown in Figure 1.5.1. Seven of these registers (R0, R1, R2, R3, A0,
A1, and FB) come in two sets; therefore, these have two register banks.
b15 b8 b7
b0
R0(Note)
H
L
b15 b8 b7
b0
R1(Note)
H
L
b15
R2(Note)
b0
Data
registers
b19
PC
b19
INTB H
b15
R3(Note)
b0
b15
USP
b15
A0(Note)
b15
A1(Note)
b0
Address
b0 registers
b15
ISP
b15
SB
b15
FB(Note)
b0
Frame base
registers
b15
FLG
L
b0
Program counter
b0
Interrupt table
register
b0
User stack pointer
b0
Interrupt stack
pointer
b0
Static base
register
b0
Flag register
IPL U I O B S Z D C
Note: These registers consist of two register banks.
Figure 1.5.1. Central processing unit register
(1) Data registers (R0, R0H, R0L, R1, R1H, R1L, R2, and R3)
Data registers (R0, R1, R2, and R3) are configured with 16 bits, and are used primarily for transfer and
arithmetic/logic operations.
Registers R0 and R1 each can be used as separate 8-bit data registers, high-order bits as (R0H/R1H),
and low-order bits as (R0L/R1L). In some instructions, registers R2 and R0, as well as R3 and R1 can
use as 32-bit data registers (R2R0/R3R1).
(2) Address registers (A0 and A1)
Address registers (A0 and A1) are configured with 16 bits, and have functions equivalent to those of data
registers. These registers can also be used for address register indirect addressing and address register
relative addressing.
In some instructions, registers A1 and A0 can be combined for use as a 32-bit address register (A1A0).
11
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