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PDF M30620M8A-XXXFP Data sheet ( Hoja de datos )

Número de pieza M30620M8A-XXXFP
Descripción SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Fabricantes Mitsubishi 
Logotipo Mitsubishi Logotipo



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Description
Mitsubishi microcomputers
M16C / 62A Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Description
The M16C/62A group of single-chip microcomputers are built using the high-performance silicon gate
CMOS process using a M16C/60 Series CPU core and are packaged in a 100-pin plastic molded QFP.
These single-chip microcomputers operate using sophisticated instructions featuring a high level of instruc-
tion efficiency. With 1M bytes of address space, they are capable of executing instructions at high speed.
They also feature a built-in multiplier and DMAC, making them ideal for controlling office, communications,
industrial equipment, and other high-speed processing applications.
The M16C/62A group includes a wide range of products with different internal memory types and sizes and
various package types.
Features
• Memory capacity .................................. ROM (See Figure 1.1.4. ROM Expansion)
RAM 3K to 20K bytes
• Shortest instruction execution time ...... 62.5ns (f(XIN)=16MHZ, VCC=5V)
100ns (f(XIN)=10MHZ, VCC=3V, with software one-wait) : Mask ROM, flash memory 5V version
• Supply voltage ..................................... 4.2V to 5.5V (f(XIN)=16MHZ, without software wait) : Mask ROM, flash memory 5V version
2.7V to 5.5V (f(XIN)=10MHZ with software one-wait) : Mask ROM, flash memory 5V version
• Low power consumption ...................... 25.5mW ( f(XIN)=10MHZ, with software one-wait, VCC = 3V)
• Interrupts .............................................. 25 internal and 8 external interrupt sources, 4 software
interrupt sources; 7 levels (including key input interrupt)
• Multifunction 16-bit timer ...................... 5 output timers + 6 input timers
• Serial I/O .............................................. 5 channels (3 for UART or clock synchronous, 2 for clock synchro-
nous)
• DMAC .................................................. 2 channels (trigger: 24 sources)
• A-D converter ....................................... 10 bits X 8 channels (Expandable up to 10 channels)
• D-A converter ....................................... 8 bits X 2 channels
• CRC calculation circuit ......................... 1 circuit
• Watchdog timer .................................... 1 line
• Programmable I/O ............................... 87 lines
_______
• Input port .............................................. 1 line (P85 shared with NMI pin)
• Memory expansion .............................. Available (to a maximum of 1M bytes)
• Chip select output ................................ 4 lines
• Clock generating circuit ....................... 2 built-in clock generation circuits
(built-in feedback resistor, and external ceramic or quartz oscillator)
Applications
Audio, cameras, office equipment, communications equipment, portable equipment
------Table of Contents------
Central Processing Unit (CPU) ..................... 11
Reset ............................................................. 14
Processor Mode ............................................ 21
Clock Generating Circuit ............................... 35
Protection ...................................................... 44
Interrupts ....................................................... 45
Watchdog Timer ............................................ 65
DMAC ........................................................... 67
Timer ............................................................. 77
Serial I/O ..................................................... 107
A-D Converter ............................................. 148
D-A Converter ............................................. 158
CRC Calculation Circuit .............................. 160
Programmable I/O Ports ............................. 162
Electrical characteristic ............................... 173
Flash memory version ................................. 216
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M30620M8A-XXXFP pdf
Description
Mitsubishi microcomputers
M16C / 62A Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Performance Outline
Table 1.1.1 is a performance outline of M16C/62A group.
Table 1.1.1. Performance outline of M16C/62A group
Item Performance
Number of basic instructions
91 instructions
Shortest instruction execution time
62.5ns(f(XIN)=16MHZ, VCC=5V)
100ns (f(XIN)=10MHZ, VCC=3V, with software one-wait)
: Mask ROM, flash memory 5V version
Memory
ROM
(See the figure 1.1.4. ROM Expansion)
capacity
RAM
3K to 20K bytes
I/O port
P0 to P10 (except P85)
8 bits x 10, 7 bits x 1
Input port P85
1 bit x 1
Multifunction TA0, TA1, TA2, TA3, TA4
16 bits x 5
timer
TB0, TB1, TB2, TB3, TB4, TB5 16 bits x 6
Serial I/O UART0, UART1, UART2
(UART or clock synchronous) x 3
SI/O3, SI/O4
(Clock synchronous) x 2
A-D converter
10 bits x (8 + 2) channels
D-A converter
8 bits x 2
DMAC
2 channels (trigger: 24 sources)
CRC calculation circuit
CRC-CCITT
Watchdog timer
15 bits x 1 (with prescaler)
Interrupt
25 internal and 8 external sources, 4 software sources, 7 levels
Clock generating circuit
2 built-in clock generation circuits
(built-in feedback resistor, and external ceramic or quartz oscillator)
Supply voltage
4.2V to 5.5V (f(XIN)=16MHZ, without software wait)
: Mask ROM, flash memory 5V version
2.7V to 5.5V (f(XIN)=10MHZ with software one-wait)
: Mask ROM, flash memory 5V version
Power consumption
25.5mW (f(XIN) = 10MHZ, VCC=3V with software one-wait)
I/O I/O withstand voltage
5V
characteristics Output current
5mA
Memory expansion
Available (to a maximum of 1M bytes)
Device configuration
CMOS high performance silicon gate
Package
100-pin plastic mold QFP
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M30620M8A-XXXFP arduino
CPU
Mitsubishi microcomputers
M16C / 62A Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Central Processing Unit (CPU)
The CPU has a total of 13 registers shown in Figure 1.4.1. Seven of these registers (R0, R1, R2, R3, A0,
A1, and FB) come in two sets; therefore, these have two register banks.
b15 b8 b7
b0
R0(Note)
H
L
b15 b8 b7
b0
R1(Note)
H
L
b15
R2(Note)
b0
Data
registers
b19
PC
b19
INTB H
b15
R3(Note)
b0
b15
USP
b15
A0(Note)
b15
A1(Note)
b0
Address
b0 registers
b15
ISP
b15
SB
b15
FB(Note)
b0
Frame base
registers
b15
FLG
L
b0
Program counter
b0
Interrupt table
register
b0
User stack pointer
b0
Interrupt stack
pointer
b0
Static base
register
b0
Flag register
IPL U I O B S Z D C
Note: These registers consist of two register banks.
Figure 1.4.1. Central processing unit register
(1) Data registers (R0, R0H, R0L, R1, R1H, R1L, R2, and R3)
Data registers (R0, R1, R2, and R3) are configured with 16 bits, and are used primarily for transfer and
arithmetic/logic operations.
Registers R0 and R1 each can be used as separate 8-bit data registers, high-order bits as (R0H/R1H),
and low-order bits as (R0L/R1L). In some instructions, registers R2 and R0, as well as R3 and R1 can
use as 32-bit data registers (R2R0/R3R1).
(2) Address registers (A0 and A1)
Address registers (A0 and A1) are configured with 16 bits, and have functions equivalent to those of data
registers. These registers can also be used for address register indirect addressing and address register
relative addressing.
In some instructions, registers A1 and A0 can be combined for use as a 32-bit address register (A1A0).
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