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PDF M29W641DL70N6F Data sheet ( Hoja de datos )

Número de pieza M29W641DL70N6F
Descripción 64 Mbit 4Mb x16 / Uniform Block 3V Supply Flash Memory
Fabricantes ST Microelectronics 
Logotipo ST Microelectronics Logotipo



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M29W641DH, M29W641DL
M29W641DU
64 Mbit (4Mb x16, Uniform Block)
3V Supply Flash Memory
PRODUCT PREVIEW
FEATURES SUMMARY
s SUPPLY VOLTAGE
– VCC = 2.7V to 3.6V Core Power Supply
– VCCQ = 1.8V to 3.6V for Input/Output
– VPP =12 V for Fast Program (optional)
s ACCESS TIME: 70, 90, 100 and 120ns
s PROGRAMMING TIME
– 10 µs typical
– Double Word Program option
s 128 UNIFORM, 32-KWord MEMORY BLOCKS
s PROGRAM/ERASE CONTROLLER
– Embedded Program and Erase algorithms
s ERASE SUSPEND and RESUME MODES
– Read and Program another Block during
Erase Suspend
s UNLOCK BYPASS PROGRAM COMMAND
– Faster Production/Batch Programming
s WRITE PROTECT OPTIONS
– M29W641DH: WP Pin for Write Protection of
Highest Address Block
– M29W641DL: WP Pin for Write Protection of
Lowest Address Block
– M29W641DU: No Write Protection
s TEMPORARY BLOCK UNPROTECTION
MODE
s COMMON FLASH INTERFACE
s EXTENDED MEMORY BLOCK
– Extra block used as security block or to store
additional information
s LOW POWER CONSUMPTION
– Standby and Automatic Standby
s ELECTRONIC SIGNATURE
– Manufacturer Code: 0020h
– Device Code M29W641D: 22C7h
Figure 1. Packages
TSOP48 (N)
12 x 20mm
FBGA
TFBGA63 (ZA)
7 x 11mm
April 2003
This is preliminary information on a new product now in development. Details are subject to change without notice.
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M29W641DL70N6F pdf
M29W641DH, M29W641DL, M29W641DU
SUMMARY DESCRIPTION
The M29W641D is a 64 Mbit (4Mb x16) non-vola-
tile memory that can be read, erased and repro-
grammed. These operations can be performed
using a single, low voltage, 2.7V to 3.6V VCC sup-
ply for the circuitry and a 1.8V to 3.6V VCCQ supply
for the Input/Output pins. An optional 12 V VPP
power supply is provided to speed up customer
programming.
On power-up the memory defaults to its Read
mode where it can be read in the same way as a
ROM or EPROM.
The highest address block of the M29W641DH or
the lowest address block of the M29W641DL can
be protected from accidental programming or era-
sure using the WP pin (if WP = VIL). The
M29W641DU does not feature the WP pin.
Each block can be erased independently so it is
possible to preserve valid data while old data is
erased. The blocks can be protected to prevent
accidental Program or Erase commands from
modifying the memory. Program and Erase com-
mands are written to the Command Interface of
the memory. An on-chip Program/Erase Controller
simplifies the process of programming or erasing
the memory by taking care of all of the special op-
erations that are required to update the memory
contents. The end of a program or erase operation
can be detected and any error conditions identi-
fied. The command set required to control the
memory is consistent with JEDEC standards.
The M29W641D has an extra block, the Extended
Block, (of 32 KWords) that can be accessed using
a dedicated command. The Extended Block can
be protected and so is useful for storing security
information. However the protection is not revers-
ible, once protected the protection cannot be un-
done.
Chip Enable, Output Enable and Write Enable sig-
nals control the bus operation of the memory.
They allow simple connection to most micropro-
cessors, often without additional logic.
The memory is offered in a 48-pin TSOP package
(M29W641DL and M29W641DH) or in a 63-ball TF-
BGA package (M29W641DU). All devices are deliv-
ered with all the bits erased (set to 1).
Figure 2. Logic Diagram
VCC VCCQ VPP
22
A0-A21
16
DQ0-DQ15
W
E M29W641D
G
RB
RP
WP
VSS
AI06697b
Table 1. Signal Names
A0-A21
Address Inputs
DQ0-DQ7 Data Inputs/Outputs
DQ8-
DQ15
Data Inputs/Outputs
E Chip Enable
G Output Enable
W Write Enable
RP
Reset/Block Temporary Unprotect
(M29W641DH and M29W641DL only)
RB
Ready/Busy Output (M29W641DU
only)
WP Write Protect
VCC
VCCQ
Supply Voltage
Supply Voltage for Input/Output
VPP
Supply Voltage for Fast Program
(optional)
VSS Ground
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M29W641DL70N6F arduino
M29W641DH, M29W641DL, M29W641DU
COMMAND INTERFACE
All Bus Write operations to the memory are inter-
preted by the Command Interface. Commands
consist of one or more sequential Bus Write oper-
ations. Failure to observe a valid sequence of Bus
Write operations will result in the memory return-
ing to Read mode. The long command sequences
are imposed to maximize data security.
See Table 3 for a summary of the commands.
Read/Reset Command
The Read/Reset command returns the memory to
its Read mode where it behaves like a ROM or
EPROM. It also resets the errors in the Status
Register. Either one or three Bus Write operations
can be used to issue the Read/Reset command.
The Read/Reset command can be issued, be-
tween Bus Write cycles before the start of a pro-
gram or erase operation, to return the device to
read mode. If the Read/Reset command is issued
during the timeout of a Block erase operation then
the memory will take up to 10µs to abort. During
the abort period no valid data can be read from the
memory. The Read/Reset command will not abort
an Erase operation when issued while in Erase
Suspend.
Auto Select Command
The Auto Select command is used to read the
Manufacturer Code, the Device Code, the Block
Protection Status and the Extended Memory Block
Verify Code. Three consecutive Bus Write opera-
tions are required to issue the Auto Select com-
mand. Once the Auto Select command is issued
the memory remains in Auto Select mode until a
Read/Reset command is issued. Read CFI Query
and Read/Reset commands are accepted in Auto
Select mode, all other commands are ignored.
In Auto Select mode the Manufacturer Code can
be read using a Bus Read operation with A0 = VIL
and A1 = VIL. The other address bits may be set to
either VIL or VIH. The Manufacturer Code for ST-
Microelectronics is 0020h.
The Device Code can be read using a Bus Read
operation with A0 = VIH and A1 = VIL. The other
address bits may be set to either VIL or VIH. The
Device Code for the M29W641D is 22C7h.
The Block Protection Status of each block can be
read using a Bus Read operation with A0 = VIL,
A1 = VIH, and A12-A21 specifying the address of
the block. The other address bits may be set to ei-
ther VIL or VIH. If the addressed block is protected
then 01h is output on Data Inputs/Outputs DQ0-
DQ7, otherwise 00h is output.
Read CFI Query Command
The Read CFI Query Command is used to read
data from the Common Flash Interface (CFI)
Memory Area. This command is valid when the de-
vice is in the Read Array mode, or when the device
is in Autoselected mode.
One Bus Write cycle is required to issue the Read
CFI Query Command. Once the command is is-
sued subsequent Bus Read operations read from
the Common Flash Interface Memory Area.
The Read/Reset command must be issued to re-
turn the device to the previous mode (the Read Ar-
ray mode or Autoselected mode). A second Read/
Reset command would be needed if the device is
to be put in the Read Array mode from Autoselect-
ed mode.
See Appendix B, Table 18 to Table 23 for details
on the information contained in the Common Flash
Interface (CFI) memory area.
Program Command
The Program command can be used to program a
value to one address in the memory array at a
time. The command requires four Bus Write oper-
ations, the final write operation latches the ad-
dress and data, and starts the Program/Erase
Controller.
If the address falls in a protected block then the
Program command is ignored, the data remains
unchanged. The Status Register is never read and
no error condition is given.
During the program operation the memory will ig-
nore all commands. It is not possible to issue any
command to abort or pause the operation. Typical
program times are given in Table 4. Bus Read op-
erations during the program operation will output
the Status Register on the Data Inputs/Outputs.
See the section on the Status Register for more
details.
After the program operation has completed the
memory will return to the Read mode, unless an
error has occurred. When an error occurs the
memory will continue to output the Status Regis-
ter. A Read/Reset command must be issued to re-
set the error condition and return to Read mode.
Note that the Program command cannot change a
bit set at ’0’ back to ’1’. One of the Erase Com-
mands must be used to set all the bits in a block or
in the whole memory from ’0’ to ’1’.
Fast Program Commands
There is a Fast Program command available to im-
prove the programming throughput, by writing sev-
eral adjacent words or bytes in parallel: the Double
Word Program command.
Double Word Program Command. The Double
Word Program command is used to write a page
of two adjacent words in parallel. The two words
must differ only for the address A0.
Three bus write cycles are necessary to issue the
Double Word Program command.
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