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Número de pieza | M48T12 | |
Descripción | 16Kbit (2 Kb x 8) TIMEKEEPER SRAM | |
Fabricantes | ST Microelectronics | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de M48T12 (archivo pdf) en la parte inferior de esta página. Total 25 Páginas | ||
No Preview Available ! M48T02
M48T12
5.0 V, 16 Kbit (2 Kb x 8) TIMEKEEPER® SRAM
Features
■ Integrated, ultra low power SRAM, real-time
clock, and power-fail control circuit
■ BYTEWIDE™ RAM-like clock access
■ BCD coded year, month, day, date, hours,
minutes, and seconds
■ Typical clock accuracy of ±1 minute a month,
at 25 °C
■ Software controlled clock calibration for high
accuracy applications
■ Automatic power-fail chip deselect and WRITE
protection
■ WRITE protect voltages
(VPFD = power-fail deselect voltage):
– M48T02: VCC = 4.75 to 5.5 V;
4.5 V ≤ VPFD ≤ 4.75 V
– M48T12: VCC = 4.5 to 5.5 V;
4.2 V ≤ VPFD ≤ 4.5 V
■ Self-contained battery and crystal in the
CAPHAT™ DIP package
■ Pin and function compatible with JEDEC
standard 2 K x 8 SRAMs
■ RoHS compliant
– Lead-free second level interconnect
24
1
PCDIP24
battery/crystal
CAPHAT™
June 2011
Doc ID 2410 Rev 9
1/25
www.st.com
1
1 page M48T02, M48T12
1 Description
Description
The M48T02/12 TIMEKEEPER® RAM is a 2 Kb x 8 non-volatile static RAM and real-time
clock which is pin and functional compatible with the DS1642.
A special 24-pin, 600 mil DIP CAPHAT™ package houses the M48T02/12 silicon with a
quartz crystal and a long life lithium button cell to form a highly integrated battery-backed
memory and real-time clock solution.
The M48T02/12 button cell has sufficient capacity and storage life to maintain data and
clock functionality for an accumulated time period of at least 10 years in the absence of
power over the operating temperature range.
The M48T02/12 is a non-volatile pin and function equivalent to any JEDEC standard
2 Kb x 8 SRAM. It also easily fits into many ROM, EPROM, and EEPROM sockets,
providing the non-volatility of PROMs without any requirement for special WRITE timing or
limitations on the number of WRITEs that can be performed.
Figure 1. Logic diagram
VCC
11
A0-A10
8
DQ0-DQ7
W M48T02
M48T12
E
G
VSS
Table 1. Signal names
A0-A10
Address inputs
DQ0-DQ7
Data inputs / outputs
E Chip enable
G Output enable
W WRITE enable
VCC Supply voltage
VSS Ground
AI01027
Doc ID 2410 Rev 9
5/25
5 Page M48T02, M48T12
Figure 7. Checking the BOK flag status
POWER-UP
READ DATA
AT ANY ADDRESS
WRITE DATA
COMPLEMENT BACK
TO SAME ADDRESS
READ DATA
AT SAME
ADDRESS AGAIN
Operation modes
IS DATA
COMPLEMENT
OF FIRST
READ?
(BATTERY OK) YES
WRITE ORIGINAL
DATA BACK TO
SAME ADDRESS
NO (BATTERY LOW)
NOTIFY SYSTEM
OF LOW BATTERY
(DATA MAY BE
CORRUPTED)
CONTINUE
AI00607
Doc ID 2410 Rev 9
11/25
11 Page |
Páginas | Total 25 Páginas | |
PDF Descargar | [ Datasheet M48T12.PDF ] |
Número de pieza | Descripción | Fabricantes |
M48T12 | 16Kbit (2 Kb x 8) TIMEKEEPER SRAM | ST Microelectronics |
M48T128V | 1 Mbit (128 Kb x 8) TIMEKEEPER SRAM | ST Microelectronics |
M48T128Y | 1 Mbit (128 Kb x 8) TIMEKEEPER SRAM | ST Microelectronics |
M48T129V | 1Mbit (128 Kbit x 8) TIMEKEEPER SRAM | STMicroelectronics |
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