|
|
PDF M41T11MH Data sheet ( Hoja de datos )
| Número de pieza | M41T11MH | |
| Descripción | 512 bit 64b x8 Serial Access TIMEKEEPER SRAM | |
| Fabricantes | ST Microelectronics | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de M41T11MH (archivo pdf) en la parte inferior de esta página. Total 29 Páginas | ||
|
No Preview Available !
www.DataSheet4U.com
M41T11
Serial Real Time Clock with 56 Bytes of NVRAM
Feature summary
■ Counters for seconds, minutes, hours, day,
date, month, years and century
■ 32KHz crystal oscillator integrating load
capacitance (12.5pF) providing exceptional
oscillator stability and high crystal series
resistance operation
■ Serial interface supports I2C bus (100kHz
protocol)
■ Ultra-low battery supply current of 0.8µA
(typ@3V)
■ 2.0 to 5.5V clock operating voltage
■ Automatic switch-over and deselect circuitry
■ 56 Bytes of general purpose RAM
■ Software clock calibration to compensate
crystal deviation due to temperature
■ Automatic leap year compensation
■ Operating temperature of –40 to 85°C
■ Packaging includes a 28-Lead SOIC and
SNAPHAT® TOP (to be ordered separately;
3.3V to 5.0V supply voltage only)
8
1
SO8 (M)
SNAPHAT (SH) Battery & Crystal
28
1
SOH28 (MH)
August 2006
Rev 6
1/29
www.st.com
1
1 page  
M41T11
1 Summary description
Summary description
Caution:
The M41T11is a low power Serial Real Time Clock with 56 bytes of NVRAM. A built-in
32.768kHz oscillator (external crystal controlled) and the first 8 bytes of the RAM are used
for the clock/calendar function and are configured in binary coded decimal (BCD) format.
Addresses and data are transferred serially via a two-line bi-directional bus. The built-in
address register is incremented automatically after each write or read data byte.
The M41T11 clock has a built-in power sense circuit which detects power failures and
automatically switches to the battery supply during power failures. The energy needed to
sustain the RAM and clock operations can be supplied from a small lithium coin cell.
Typical data retention time is in excess of 5 years with a 50mA/h 3V lithium cell. The
M41T11 is supplied in 8 lead Plastic Small Outline package or 28 lead SNAPHAT® package.
The 28-pin, 330mil SOIC provides sockets with gold plated contacts at both ends for direct
connection to a separate SNAPHAT housing containing the battery and crystal. The unique
design allows the SNAPHAT battery package to be mounted on top of the SOIC package
after the completion of the surface mount process. Insertion of the SNAPHAT housing after
reflow prevents potential battery and crystal damage due to the high temperatures required
for device surface-mounting. The SNAPHAT housing is keyed to prevent reverse insertion.
The SOIC and battery/crystal packages are shipped separately in plastic anti-static tubes or
in Tape & Reel form.
For the 28-lead SOIC, the battery/crystal package (i.e. SNAPHAT) part number is “M4Txx-
BR12SH” (see Table 16 on page 27).
Do not place the SNAPHAT battery/crystal package “M4Txx-BR12SH” in conductive foam
since this will drain the lithium button-cell battery.
Figure 1. Logic diagram
VCC VBAT
OSCI
SCL
M41T11
OSCO
SDA
FT/OUT
VSS
AI01000
5/29
5 Page 
M41T11
Operation
Table 2. AC characteristics
Symbol
Parameter(1)
Min Max Unit
fSCL
tLOW
tHIGH
tR
tF
tHD:STA
SCL clock frequency
Clock low period
Clock high period
SDA and SCL rise time
SDA and SCL fall time
START condition hold time
(after this period the first clock pulse is generated)
0 100 kHz
4.7 µs
4 µs
1 µs
300 ns
4 µs
tSU:STA
START condition setup time
(only relevant for a repeated start condition)
4.7 µs
tSU:DAT Data setup time
tHD:DAT(2) Data hold time
250 ns
0 µs
tSU:STO STOP condition setup time
4.7 µs
tBUF Time the bus must be free before a new transmission can start 4.7
µs
1. Valid for Ambient Operating Temperature: TA = –40 to 85°C; VCC = 2.0 to 5.5V (except where noted).
2. Transmitter must internally provide a hold time to bridge the undefined region (300ns max.) of the falling
edge of SCL.
2.2 READ Mode
In this mode, the master reads the M41T11 slave after setting the slave address (see
Figure 8). Following the write Mode Control Bit (R/W = 0) and the Acknowledge Bit, the word
address An is written to the on-chip address pointer. Next the START condition and slave
address are repeated, followed by the READ Mode Control Bit (R/W = 1). At this point, the
master transmitter becomes the master receiver. The data byte which was addressed will be
transmitted and the master receiver will send an Acknowledge Bit to the slave transmitter.
The address pointer is only incremented on reception of an Acknowledge Bit. The M41T11
slave transmitter will now place the data byte at address An + 1 on the bus. The master
receiver reads and acknowledges the new byte and the address pointer is incremented to
An + 2.
This cycle of reading consecutive addresses will continue until the master receiver sends a
STOP condition to the slave transmitter.
An alternate READ mode may also be implemented, whereby the master reads the M41T11
slave without first writing to the (volatile) address pointer. The first address that is read is the
last one stored in the pointer (see Figure 10 on page 12).
11/29
11 Page | ||
| Páginas | Total 29 Páginas | |
| PDF Descargar | [ Datasheet M41T11MH.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| M41T11M | 512 bit 64b x8 Serial Access TIMEKEEPER SRAM | ST Microelectronics |
| M41T11MH | 512 bit 64b x8 Serial Access TIMEKEEPER SRAM | ST Microelectronics |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |