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PDF MAS9181CS Data sheet ( Hoja de datos )

Número de pieza MAS9181CS
Descripción OCTAL 8 BIT TRIMMER IC
Fabricantes ETC 
Logotipo ETC Logotipo



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No Preview Available ! MAS9181CS Hoja de datos, Descripción, Manual

 ¢¡¤£¦¥¨§¨©¨§¨¤DA9181.006
13 October, 1999
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The MAS9181 comprises eight digital to analog
converters (DACs) each controlled by a two-wire I2C
bus. The DACs are individually programmed using an 8-
bit word to select an output from one of 256 voltage
‘“’i”C•P–E—E’i˜steps. The maximum output voltage of all DACs is set
by Vmax and the resolution is Vmax/256. At power-on all
outputs are set to their lowest value. The I2C-bus slave
receiver has 3 programmable address pins (2 for
MAS9181 CS).
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· Rail to rail output stages
· Octal 8-bit DACs on a single monolithic chip
· Power supply range from +5 V to +12 V
· -20°C to +85°C temperature range
· 16-pin PDIL and SO package
·jEPkmol@wer-uppCreq r…sesWt tPr…u
· Trimmer replacement
· AGC/AFT or TVs and VCRs
· Graphic equalizers
· High resolution monitors
{
SDA
I C Bus
SCL Slave
Receiver
A0
A1
A2
vxwmy z Reference
Voltage
Generator
8-BIT DAC
8-BIT DAC
8-BIT DAC
8-BIT DAC
DAC7
8-BIT DAC
8-BIT DAC
8-BIT DAC
8-BIT DAC
DAC6
DAC5
DAC4
DAC3
DAC2
DAC1
DAC0
VDD GND
1

1 page




MAS9181CS pdf
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DA9181.006
13 October, 1999
The MAS9181 I2C-bus interface is a receiver- only slave. Data is accepted from the I2C - bus in the following
format.
S 0 1 0 0 A2 A1 A0 0 A I3 I2 I1 I0 SD SC SB A D7 D6 D5 D4 D3 D2 D1 A P
SA D0
Address byte
Instruction byte
First data byte
S Start condition
P Stop condition
A Acknowledgement
aSb c dWefg hPi p q!p rs
A2, A1, A0
I3, I2, I1, I0
SD, SC, SB, SA
D7, D6, D5, D4, D3, D2, D2, D1, D0
programmable address bits
instruction bits
sub-address bits
data bits
t
Bit Transfer on the I C-bus
SDA
SCL
Data line
stable
(data valid)
Change
of data
allowed
Complete Data Transfer
SDA
SCL
S
Start
condition
1-7
Address
8
R/W
9
Ack
1-7 8
9
Data
Ack
1-7 8
Data
9
P
Ack Stop
condition
5

5 Page










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