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Número de pieza | MAS8444AN | |
Descripción | OCTAL 6-BIT TRIMMER IC | |
Fabricantes | ETC | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de MAS8444AN (archivo pdf) en la parte inferior de esta página. Total 9 Páginas | ||
No Preview Available ! DA8444A.005
May 31, 1996
MAS8444A
OCTAL 6-BIT TRIMMER IC
• Eight discrete DACs
• I2C-bus slave receiver
• Voltage output
DESCRIPTION
The MAS8444a comprises eight digital to analog
converters (DACs) each controlled by a two-wire I2C
bus. The DACs are individually programmed using an
6-bit word to select an output from one of 64 voltage
steps. The maximum output voltage of all DACs is set
by Vmax. At power-on all outputs are set to their lowest
value. The I2C-bus slave receiver has 3 programmable
address pins (2 in the SO16 package).
FEATURES
• Rail to rail output stages
• Octal 6-bit DACs on a single monolithic chip
• Pow er supply¡ range from +5V to +12V
• -25 C to +85 C temperature range
• 16-pin PDIL and SO package
• pin to pin compatibility with TDA8444
APPLICATION
• Trimmer replacement
• Automatic gain control
• High resolution monitors
BLOCK DIAGRAM
SDA 3
SCL 4
A0 5
A1 6
A2 7
I2C Bus
Slave
Receiver
Vmax 2
Reference
Voltage
Generator
18
VDD GND
6-BIT DAC
6-BIT DAC
6-BIT DAC
6-BIT DAC
6-BIT DAC
6-BIT DAC
6-BIT DAC
6-BIT DAC
DAC7
DAC6
DAC5
DAC4
DAC3
DAC2
DAC1
DAC0
1
1 page DA8444A.005
May 31, 1996
ELECTRICAL CHARACTERISTICS
CONT.
Linearity
(All voltages are with respect to GND; Tamb = 25 oC; VDD = 12V unless otherwise specified)
Parameter
Symbol
Conditions
Min Typ Max Unit
Differential nonlinearity
DNL
Io = -2mA; Vmax = VDD
-0.5 0.1
0.5 LSB
Integral nonlinearity
INL
Io = -2mA; Vmax = VDD
-0.5 0.1
0.5 LSB
FUNCTIONS
I2C - bus
The MAS8444A I2C-bus interface is a receiver-only slave. Data is accepted from the I2C-bus in the following format.
S
0 1 0 0 A2 A1 A0 0
A I3 I2 I1 I0 SD SC SB SA
A D7 D6 D5 D4 D3 D2 D1 D0
Address byte
Instruction byte
First data byte
AP
S Start condition
P Stop condition
A Acknowledgement
I2C - bus timing
A2, A1, A0
I3, I2, I1, I0
SD, SC, SB, SA
D7, D6, D5, D4, D3, D2, D2, D1, D0
programmable address bits
instruction bits
sub-address bits
data bits
SDA
Bit Transfer on the I2C-bus
SCL
SDA
Data line
stable
(data valid)
Change
of data
allowed
Complete Data Transfer
SCL
S
Start
condition
1-7
Address
8
R/W
9
Ack
1-7 8
9
Data
Ack
1-7 8
Data
9
P
Ack Stop
condition
5
5 Page |
Páginas | Total 9 Páginas | |
PDF Descargar | [ Datasheet MAS8444AN.PDF ] |
Número de pieza | Descripción | Fabricantes |
MAS8444A | OCTAL 6-BIT TRIMMER IC | ETC |
MAS8444AN | OCTAL 6-BIT TRIMMER IC | ETC |
MAS8444AS | OCTAL 6-BIT TRIMMER IC | ETC |
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