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PDF MACH220-12JC Data sheet ( Hoja de datos )
| Número de pieza | MACH220-12JC | |
| Descripción | High-Density EE CMOS Programmable Logic | |
| Fabricantes | Lattice | |
| Logotipo |  |
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FINAL
COM’L: -10/12/15/20 IND: -14/18/24
MACH220-10/12/15/20
High-Density EE CMOS Programmable Logic
Lattice Semiconductor
DISTINCTIVE CHARACTERISTICS
68 Pins
96 Macrocells
10 ns tPD
100 MHz fCNT
56 Inputs with pull-up resistors
GENERAL DESCRIPTION
The MACH220 is a member of the high-performance
EE CMOS MACH 2 device family. This device has
approximately nine times the logic macrocell capability
of the popular PAL22V10 without loss of speed.
The MACH220 consists of eight PAL blocks intercon-
nected by a programmable switch matrix. The eight PAL
blocks are essentially “PAL26V12” structures complete
with product-term arrays, and programmable macro-
cells, including buried macrocells. The switch matrix
connects the PAL blocks to each other and to all input
pins, providing a high degree of connectivity between
the fully-connected PAL blocks. This allows designs to
be placed and routed efficiently.
The MACH220 has two kinds of macrocell: output and
buried. The output macrocell provides registered,
latched, or combinatorial outputs with programmable
BLOCK DIAGRAM
If you would like to view
Block Diagram in full size,
please click on the box.
48 Outputs
96 Flip-flops; 4 clock choices
8 “PAL26V12” blocks with buried macrocells
Pin-compatible with MACH120 and MACH221
polarity. If a registered configuration is chosen, the
register can be configured as D-type or T-type to help
reduce the number of product terms. The register type
decision can be made by the designer or by the
software. All output macrocells can be connected to an
I/O cell. If a buried macrocell is desired, the internal
feedback path from the macrocell can be used, which
frees up the I/O pin for use as an input.
The MACH220 has dedicated buried macrocells which,
in addition to the capabilities of the output macrocell,
also provide input registers for use in synchronizing
signals and reducing setup time requirements.
Publication# 14130 Rev. I Amendment /0
Issue Date: May 1995
1 page  
ORDERING INFORMATION
Industrial Products
Programmable logic products for industrial applications are available with several ordering options. The order number (Valid
Combination) is formed by a combination of:
MACH 220 -14 J I
FAMILY TYPE
MACH = Macro Array CMOS High-Speed
DEVICE NUMBER
220 = 96 Macrocells, 68 Pins
SPEED
-14 = 14.5 ns tPD
-18 = 18 ns tPD
-24 = 24 ns tPD
OPTIONAL PROCESSING
Blank = Standard Processing
OPERATING CONDITIONS
I = Industrial (–40°C to +85°C)
PACKAGE TYPE
J = 68-Pin Plastic Leaded
Chip Carrier (PL 068)
Valid Combinations
MACH220-14
MACH220-18
MACH220-24
JI
Valid Combinations
The Valid Combinations table lists configurations
planned to be supported in volume for this device.
Consult your local sales office to confirm availability
of specific valid combinations and to check on newly
released combinations.
MACH220-14/18/24 (Ind)
5
5 Page 
ABSOLUTE MAXIMUM RATINGS
Storage Temperature . . . . . . . . . . . . 65°C to +150°C
Ambient Temperature
with Power Applied . . . . . . . . . . . . . –55°C to +125°C
Supply Voltage with
Respect to Ground . . . . . . . . . . . . . –0.5 V to +7.0 V
DC Input Voltage . . . . . . . . . . . . –0.5 V to VCC + 0.5 V
DC Output or
I/O Pin Voltage . . . . . . . . . . . . . –0.5 V to VCC + 0.5 V
Static Discharge Voltage . . . . . . . . . . . . . . . . . 2001 V
Latchup Current
(TA = 0°C to +70°C) . . . . . . . . . . . . . . . . . . . . 200 mA
Stresses above those listed under Absolute Maximum Ratings
may cause permanent device failure. Functionality at or above
these limits is not implied. Exposure to Absolute Maximum
Ratings for extended periods may affect device reliability.
Programming conditions may differ.
OPERATING RANGES
Commercial (C) Devices
Temperature (TA) Operating
in Free Air . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C
Supply Voltage (VCC) with
Respect to Ground . . . . . . . . . . . . +4.75 V to +5.25 V
Operating ranges define those limits between which the func-
tionality of the device is guaranteed.
DC CHARACTERISTICS over COMMERCIAL operating ranges unless otherwise specified
Parameter
Symbol
Parameter Description
Test Conditions
Min Typ Max Unit
VOH
VOL
VIH
VIL
IIH
IIL
IOZH
IOZL
ISC
ICC
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
Input HIGH Leakage Current
Input LOW Leakage Current
Off-State Output Leakage
Current HIGH
Off-State Output Leakage
Current LOW
Output Short-Circuit Current
Supply Current (Typical)
IOH = –3.2 mA, VCC = Min
VIN = VIH or VIL
IOL = 16 mA, VCC = Min
VIN = VIH or VIL
Guaranteed Input Logical HIGH
Voltage for all Inputs (Note 1)
Guaranteed Input Logical LOW
Voltage for all Inputs (Note 1)
VIN = 5.25 V, VCC = Max (Note 2)
VIN = 0 V, VCC = Max (Note 2)
VOUT= 5.25 V, VCC = Max
VIN = VIHor VIL (Note 2)
VOUT= 0 V, VCC = Max
VIN = VIHor VIL (Note 2)
VOUT= 0.5 V, VCC = Max (Note 3)
VCC = 5 V, TA = 25°C, f = 25 MHz (Note 4)
2.4 V
0.5 V
2.0 V
0.8 V
10
–100
10
µA
µA
µA
–100 µA
–30 –130 mA
205 mA
Notes:
1. These are absolute values with respect to device ground and all overshoots due to system or tester noise are included.
2. I/O pin leakage is the worst case of IIL and IOZL (or IIH and IOZH).
3. Not more than one output should be shorted at a time and duration of the short-circuit should not exceed one second.
VOUT = 0.5 V has been chosen to avoid test problems caused by tester ground degradation.
4. Measured with a 12-bit up/down counter pattern. This pattern is programmed in each PAL block and is capable of being
loaded, enabled, and reset.
MACH220-12/15/20 (Com’l)
11
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