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PDF MACH111-18 Data sheet ( Hoja de datos )
| Número de pieza | MACH111-18 | |
| Descripción | High-Performance EE CMOS Programmable Logic | |
| Fabricantes | Advanced Micro Devices | |
| Logotipo |  |
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FINAL
COM’L: -5/7/10/12/15 IND: -7/10/12/14/18
MACH®111-5/7/10/12/15
High-Performance EE CMOS Programmable Logic
DISTINCTIVE CHARACTERISTICS
x 44 Pins in PLCC and TQFP
x 32 Macrocells
x 5 ns tPD Commercial, 7.5 ns tPD Industrial
x 182 MHz fCNT
x 32 I/Os; 4 dedicated inputs/clocks; 2 dedicated inputs
x 32 Flip-flops; 4 clock choices
x 2 “PALCE26V16” blocks
x SpeedLocking™ for guaranteed fixed timing
x Bus-Friendly™ Inputs and I/Os
x Peripheral Component Interconnect (PCI) compliant (-5/-7/-10/-12)
x Programmable power-down mode
x Safe for mixed supply voltage system designs
x Pin-compatible with the MACH211
GENERAL DESCRIPTION
The MACH111 is a member of Vantis’ high-performance EE CMOS MACH 1 & 2 families. This
device has approximately three times the logic macrocell capability of the popular PALCE22V10
without loss of speed.
The MACH111 consists of two PAL® blocks interconnected by a programmable switch matrix.
The two PAL blocks are essentially “PALCE26V16” structures complete with product-term arrays
and programmable macrocells, which can be programmed as high speed or low power. The
switch matrix connects the PAL blocks to each other and to all input pins, providing a high
degree of connectivity between the fully connected PAL blocks. This allows designs to be placed
and routed efficiently.
The MACH111 macrocell provides either registered or combinatorial outputs with programmable
polarity. If a registered configuration is chosen, the register can be configured as D-type or T-
type to help reduce the number of product terms. The register type decision can be made by
the designer or by the software. All macrocells can be connected to an I/O cell. If a buried
macrocell is desired, the internal feedback path from the macrocell can be used, which frees up
the I/O pin for use as an input.
Vantis offers software design support for MACH devices through its own development system
and device fitters integrated into third-party CAE tools. Platform support extends across PCs,
Sun and HP workstations under advanced operating systems such as Windows 3.1, Windows 95
and NT, SunOS and Solaris, and HPUX.
Publication# 20420 Rev: B
Amendment/+1
Issue Date: June 1998
1 page  
CONNECTION DIAGRAM
Top View
44-Pin TQFP
I/O5
I/O6
I/O7
I0
CLK0/I1
GND
CLK1/I2
I/O8
I/O9
I/O10
I/O11
1
2
3
4
5
6
7
8
9
10
11
Note:
Pin-compatible with the MACH211SP.
PIN DESIGNATIONS
CLK/I = Clock or Input
GND = Ground
I = Input
I/O = Input/Output
VCC = Supply Voltage
33 I/O27
32 I/O26
31 I/O25
30 I/O24
29 CLK3/I5
28 GND
27 CLK2/I4
26 I3
25 I/O23
24 I/O22
23 I/O21
20420B-3
MACH111-5/7/10/12/15
5
5 Page 
ABSOLUTE MAXIMUM RATINGS
Storage Temperature . . . . . . . . . . . . . –65°C to +150°C
Ambient Temperature
with Power Applied . . . . . . . . . . . . . –55°C to +125°C
Device Junction Temperature . . . . . . . . . . . . . +150°C
Supply Voltage with
Respect to Ground . . . . . . . . . . . . . . –0.5 V to +7.0 V
DC Input Voltage . . . . . . . . . . . .–0.5 V to VCC + 0.5 V
DC Output or
I/O Pin Voltage . . . . . . . . . . . . . –0.5 V to VCC + 0.5 V
Static Discharge Voltage . . . . . . . . . . . . . . . . . 2001 V
Latchup Current (TA = 0°C to 70°C) . . . . . . . . . 200 mA
Stresses above those listed under Absolute Maximum
Ratings may cause permanent device failure. Functionality at or
above these limits is not implied. Exposure to Absolute Maximum
Ratings for extended periods may affect device reliability.
OPERATING RANGES
Commercial (C) Devices
Ambient Temperature (TA)
Operating in Free Air . . . . . . . . . . . . . . . 0°C to +70°C
Supply Voltage (VCC)
with Respect to Ground . . . . . . . . . +4.75 V to +5.25 V
Operating ranges define those limits between which the
functionality of the device is guaranteed.
DC CHARACTERISTICS over COMMERCIAL operating ranges
Parameter
Symbol
Parameter Description
Test Conditions
Min Typ Max Unit
VOH Output HIGH Voltage
VOL Output LOW Voltage
VIH Input HIGH Voltage
IOH = –3.2 mA, VCC = Min, VIN = VIH or VIL
IOL = 16 mA, VCC = Min, VIN = VIH or VIL
Guaranteed Input Logical HIGH Voltage
for all Inputs (Note 1)
2.4
2.0
V
0.5 V
V
VIL Input LOW Voltage
Guaranteed Input Logical LOW Voltage for
all Inputs (Note 1)
0.8 V
IIH
IIL
IOZH
IOZL
ISC
ICC
Input HIGH Current
VIN = 5.25 V, VCC = Max (Note 2)
Input LOW Current
VIN = 0 V, VCC = Max (Note 2)
Off-State Output Leakage Current VOUT = 5.25 V, VCC = Max
HIGH
VIN = VIH or VIL (Note 2)
Off-State Output Leakage Current VOUT = 0 V, VCC = Max
LOW
VIN = VIH or VIL (Note 2)
Output Short-Circuit Current
VOUT = 0.5 V, VCC = Max (Note 3)
Supply Current (Static)
VCC = 5 V, TA = 25°C, f = 0 MHz (Note 4)
Supply Current (Active)
VCC = 5 V, TA = 25°C, f = 1 MHz (Note 4)
–30
10 µA
–10 µA
10 µA
–10 µA
–160 mA
40 mA
45 mA
Notes:
1. These are absolute values with respect to device ground and all overshoots due to system and/or tester noise are included.
2. I/O pin leakage is the worst case of IIL and IOZL (or IIH and IOZH).
3. Not more than one output should be shorted at a time. Duration of the short-circuit should not exceed one second.
VOUT = 0.5 V has been chosen to avoid test problems caused by tester ground degradation.
4. Measured with a 16-bit up/down counter program in low-power mode. This pattern is programmed in each PAL block and is
capable of being enabled and reset.
MACH111-5/7/10/12/15 (Com’l)
11
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| PDF Descargar | [ Datasheet MACH111-18.PDF ] | |
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