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PDF MACH110-20 Data sheet ( Hoja de datos )
| Número de pieza | MACH110-20 | |
| Descripción | High-Density EE CMOS Programmable Logic | |
| Fabricantes | Advanced Micro Devices | |
| Logotipo |  |
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FINAL
COM’L: -12/15/20
IND: -14/18/24
MACH110-12/15/20
High-Density EE CMOS Programmable Logic
Advanced
Micro
Devices
DISTINCTIVE CHARACTERISTICS
s 44 Pins
s 32 Macrocells
s 12 ns tPD Commercial
14 ns tPD Industrial
s 77 MHz fCNT
s 38 Inputs
GENERAL DESCRIPTION
The MACH110 is a member of AMD’s high-performance
EE CMOS MACH 1 family. This device has approxi-
mately three times the logic macrocell capability of the
popular PAL22V10 without loss of speed.
The MACH110 consists of two PAL blocks intercon-
nected by a programmable switch matrix. The two PAL
blocks are essentially “PAL22V16” structures complete
with product-term arrays and programmable macro-
cells. The switch matrix connects the PAL blocks to
each other and to all input pins, providing a high degree
of connectivity between the fully-connected PAL blocks.
This allows designs to be placed and routed efficiently.
s 32 Outputs
s 32 Flip-flops; 2 clock choices
s 2 “PAL22V16” Blocks
s Pin-compatible with MACH111, MACH210,
MACH211, MACH215
The MACH110 macrocell provides either registered or
combinatorial outputs with programmable polarity. If a
registered configuration is chosen, the register can be
configured as D-type or T-type to help reduce the
number of product terms. The register type decision can
be made by the designer or by the software. All
macrocells can be connected to an I/O cell. If a buried
macrocell is desired, the internal feedback path from the
macrocell can be used, which frees up the I/O pin for use
as an input.
Publication# 14127 Rev. I Amendment /0
Issue Date: May 1995
1 page  
AMD
ORDERING INFORMATION
Industrial Products
AMD programmable logic products for Industrial applications are available with several ordering options. The order number (Valid
Combination) is formed by a combination of:
MACH 110 -14 J I
FAMILY TYPE
MACH = Macro Array CMOS High-Speed
DEVICE NUMBER
110 = 32 Macrocells, 44 Pins
SPEED
-14 = 14 ns tPD
-18 = 18 ns tPD
-24 = 24 ns tPD
OPTIONAL PROCESSING
Blank = Standard Processing
OPERATING CONDITIONS
I = Industrial (–40°C to +85°C)
PACKAGE TYPE
J = 44-Pin Plastic Leaded Chip
Carrier (PL 044)
Valid Combinations
MACH110-14
MACH110-18
JI
MACH110-24
Valid Combinations
The Valid Combinations table lists configurations
planned to be supported in volume for this device.
Consult the local AMD sales office to confirm availability
of specific valid combinations and to check on newly
released combinations.
MACH110-14/18/25 (Ind)
5
5 Page 
CAPACITANCE (Note 1)
Parameter
Symbol
CIN
COUT
Parameter Description
Input Capacitance
Output Capacitance
Test Conditions
VIN= 2.0 V VCC = 5.0 V, TA = 25°C
VOUT= 2.0 V f = 1 MHz
AMD
Typ Unit
6 pF
8 pF
SWITCHING CHARACTERISTICS over INDUSTRIAL operating ranges (Note 2)
Parameter
Symbol Parameter Description
-14 -18 -24
Min Max Min Max Min Max Unit
tPD Input, I/O, or Feedback to Combinatorial
Output (Note 3)
14.5 18
24 ns
tS
Setup Time from Input, I/O, or Feedback
to Clock
D-type 8.5
12
16
T-type 10 13.5 17
ns
ns
tH Hold Time
0 0 0 ns
tCO Clock to Output (Note 3)
10 12 14.5 ns
tWL Clock Width
LOW 7.5
7.5
10
ns
tWH
HIGH 7.5
7.5
10
ns
D-type 53.5
40
32 MHz
Maximum
External Feedback 1/(tS + tCO)
T-type 50
38
30 MHz
fMAX Frequency
D-type 61.5
53
38 MHz
(Note 1)
Internal Feedback (fCNT)
T-type 57
44 34.5 MHz
No Feedback
1/(tWL + tWH)
66.5 66.5
50 MHz
tAR Asynchronous Reset to Registered Output
19.5 24
30 ns
tARW Asynchronous Reset Width (Note 1)
14.5 18
24 ns
tARR Asynchronous Reset Recovery Time (Note 1)
10 12 18 ns
tAP Asynchronous Preset to Registered Output
19.5 24
30 ns
tAPW Asynchronous Preset Width (Note 1)
14.5 18
24 ns
tAPR Asynchronous Preset Recovery Time (Note 1)
10 12 18 ns
tEA Input, I/O, or Feedback to Output Enable (Note 3)
14.5 18
24 ns
tER Input, I/O, or Feedback to Output Disable (Note 3)
14.5 18
24 ns
Notes:
1. These parameters are not 100% tested, but are evaluated at initial characterization and at any time the design is modified
where capacitance may be affected.
2. See Switching Test Circuit, for test conditions.
3. Parameters measured with 16 outputs switching.
MACH110-14/18/20 (Ind)
11
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| Páginas | Total 28 Páginas | |
| PDF Descargar | [ Datasheet MACH110-20.PDF ] | |
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