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PDF IDT49FCT3805 Data sheet ( Hoja de datos )
| Número de pieza | IDT49FCT3805 | |
| Descripción | FAST CMOS BUFFER/CLOCK DRIVER | |
| Fabricantes | Integrated Device | |
| Logotipo |  |
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Integrated Device Technology, Inc.
FAST CMOS
BUFFER/CLOCK DRIVER
IDT49FCT3805/A
FEATURES:
• 0.5 MICRON CMOS Technology
• Guaranteed low skew < 500ps (max.)
• Very low duty cycle distortion < 1.0ns (max.)
• Very low CMOS power levels
• TTL compatible inputs and outputs
• Inputs can be driven from 3.3V or 5V components
• Two independent output banks with 3-state control
• 1:5 fanout per bank
• ‘Heartbeat’ monitor output
• Available in DIP, SOIC, SSOP, QSOP, Cerpack and
LCC packages
• Military product compliant to MIL-STD-883, Class B
• VCC = 3.3V ± 0.3V
DESCRIPTION:
The FCT3805/A is a 3.3 volt, non-inverting clock driver built
using advanced dual metal CMOS technology. The device
consists of two banks of drivers, each with a 1:5 fanout and its
own output enable control. The device has a "heartbeat"
monitor for diagnostics and PLL driving. The MON output is
identical to all other outputs and complies with the output
specifications in this document. The FCT3805/A offers low
capacitance inputs with hysteresis.
The FCT3805/A is designed for high speed clock distribu-
tion where signal quality and skew are critical. The FCT 3805
also allows single point-to-point transmission line driving in
applications such as address distribution, where one signal
must be distributed to multiple receivers with low skew and
high signal quality.
FUNCTIONAL BLOCK DIAGRAM
PIN CONFIGURATIONS
VCCA
OA1
1
2
20 VCCB
19 OB1
OEA
INA
INB
5
OA1-OA5
5
OB1-OB5
OA2
3
18
OA3
4
17
P20-1
GNDA
5
D20-1
SO20-2
16
OA4
6
SO20-7
SO20-8
15
OA5
7
&
E20-1
14
GNDQ
8
13
OB2
OB3
GNDB
OB4
OB5
MON
OEB
MON
3102 drw 01
OEA
INA
9
10
12 OEB
11 INB
3102 drw 02
DIP/SOIC/SSOP/QSOP/CERPACK
TOP VIEW
INDEX
OA3
GNDA
OA4
OA5
GNDQ
32
20 19
4 1 18
5 17
6
L20-2
16
7 15
8 14
9 10 11 12 13
OB2
OB3
GNDB
OB4
OB5
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
©1996 Integrated Device Technology, Inc.
9.5
LCC
TOP VIEW
3102 drw 03
OCTOBER 1995
DSC-3102/4
1
1 page  
IDT49FCT3805/A
FAST CMOS BUFFER/CLOCK DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE(3,4)
Symbol
Parameter
tPLH Propagation Delay
tPHL INA to OAn, INB to OBn
tR Output Rise Time
tF Output Fall Time
FCT3805
Com'l.
Mil.
FCT3805A
Com'l.
Mil.
Condition(1) Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max.
CL = 50pF 1.5 5.8
RL = 500Ω
1.5 5.0
— 2.0 —
— 2.0 —
Unit
ns
ns
— 2.0 —
— 2.0 —
ns
tSK(o) Output skew: skew between outputs of all
banks of same package (inputs tied together)
— 0.7 —
— 0.5 —
ns
tSK(p) Pulse skew: skew between opposite
transitions of same output (|tPHL–t PLH|)
— 1.2 —
— 1.0 —
ns
tSK(t)
Package skew: skew between outputs of
different packages at same power supply
voltage, temperature, package type and
speed grade
— 1.5 —
— 1.2 —
ns
tPZL Output Enable Time
tPZH OEA to OAn, OEB to OBn
1.5 6.5
1.5 6.0
ns
tPLZ Output Disable Time
tPHZ OEA to OAn, OEB to OBn
1.5 5.5
1.5 5.0
ns
NOTES:
3102 tbl 07
1. See test circuits and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. tPLH, tPHL, tSK(t) production tested. All other parameters guaranteed but not production tested.
4. Propagation delay range indicated by Min. and Max. limit is due to VCC, operating temperature and process parameters. These propagation delay
limits do not imply skew.
9.5 5
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