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PDF M66271FP Data sheet ( Hoja de datos )
| Número de pieza | M66271FP | |
| Descripción | OPERATION PANEL CONTROLLER | |
| Fabricantes | Mitsubishi | |
| Logotipo |  |
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MITSUBISHI <DIGITAL ASSP>
M66271FP
OPERATION PANEL CONTROLLER
DESCRIPTION
The M66271FP is a graphic display-only controller for displaying a
high duty dot matrix type LCD which is used widely for PPC,FAX
and multi-function telephones.
It is capable of controlling a monochrome STN LCD system of up
to 320 x 240 dots.
The IC has a built-in 9600-byte VRAM as a display data memory.
All of the VRAM addresses are externally opened. Address
mapping in the MPU memory space allows direct addressing of all
display data from the MPU,thus providing efficient display data
processing such as drawing.
The built-in arbiter circuit (cycle steal system) which gives priority
to display access allows timing-free access from MPU to VRAM,
preventing display screen distortion.
The IC provides interface with a 8-bit/16-bit MPU with a
READY(WAIT) pin.
And this IC has a function for LCD module built-in system by
lessening connect pins between MPU.
FEATURES
q Displayable LCD
•Monochrome STN dot matrix type LCD of up to 76800
dots (equivalent to 320 × 240 dots)
•Maximum display duty : 1/240 (set to 240 Line)
: 1/255 (Max)
q Display memory
•Built-in 9600-byte(76800-bit)VRAM (equivalent to one
screen of 320 × 240 dots LCD)
•All addresses of built-in VRAM are externally opened.
PIN CONFIGURATION(TOP VIEW)
q Interface with MPU
•Capability of switching 8-bit type MPU/16-bit type MPU
•With WAIT output pin (Accessing register from MPU without
WAIT output. Accessing VRAM from MPU with WAIT output.)
•Capability of controlling BHE or LWR/ HWR at the interface
with a 16-bit MPU.
q Interface with LCD
•LCD display data are 4-bit parallel output
•4 kinds of control signals: CP,LP,FLM and M
q Display functions
•Graphic display only (characters drawn graphically)
•Binary display only (without tone display function)
•Vertical scrolling is allowed within memory range
(small size LCD only)
q Additional function for LCD module built-in system
•15 kinds of interface with MPU : A<4:1>,D<7:0>,IOCS,LW R,RD
•Accessing VRAM from MPU through I/O register
•Capability of interfacing with 8-bit type MPU only
q 5V single power supply
q 80-pin QFP
APPLICATION
•PPC/FAX operation panel,display/operation panel of other OA
equipment
•Multi-function/public telephones
•PDA/electronic notebook/information terminal
•Other applications using LCD of 76800 dots or less
VSS
DISPLAY DATA TRANSFER CLOCK CP
DISPLAY DATA LATCH PULSE LP
FIRST LINE MARKER FLM
UD<0>
UD<1>
LCD DISPLAY DATA BUS UD<2>
UD<3>
N.C
N.C
N.C
N.C
VDD
OSCILLATOR INPUT OSC1
OSCILLATOR OUTPUT OSC2
VSS
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
M66271FP
40 VSS
39 N.C
38 N.C
37 N.C
36 N.C
35 VSS
34 VDD
33 N.C
32 N.C
31 A<13>
30 A<12>
29 A<11>
28 A<10> MPU ADDRESS BUS
27 A<9>
26 A<8>
25 VSS
Outline 80P6N-A
N.C : No Connection
1 page  
MITSUBISHI <DIGITAL ASSP>
M66271FP
OPERATION PANEL CONTROLLER
Combination of control input pins for MPU interface
Table-1 – 6 show conditions of input setting when access the control register and VRAM from MPU
(1) Access control register (Use address=A<4:0>,Data=D<7:0>)
Table-1 IOCS LWR
LL
LH
HX
RD
H
L
X
Operation
Write to control register
Read from control register
Invalid
(2) Writing to VRAM
(2-1) When use 8-bit MPU (MPUSEL="L",BHE=HWR="H":set)
Table-2
MPU
SEL
MCS BHE A<0> HWR LWR
Odd address
LL H LH L
H
XH
HXX
Invalid
Write
Invalid
Even address
Write
Invalid
Invalid
Valid data bus
width of MPU
8-bit
(2-2) When use 16-bit MPU (In MPU controls byte access with A<0> and BHE. MPUSEL=HWR="H":set)
Table-3
MPU
SEL
MCS BHE A<0> HWR LWR
HL L L HL
H
H
L
H
L
H
H
L
H
L
H
H XX
X
Upper byte
Write
Invalid
Write
Invalid
Invalid
Invalid
Invalid
Invalid
Lower byte
Write
Invalid
Invalid
Invalid
Write
Invalid
Write
Invalid
Valid data bus
width of MPU
16-bit
Upper 8-bit
Lower 8-bit
Lower 8-bit
Even if A<0>="H",
enable to write
(2-3) When use 16-bit MPU (In MPU controls byte access with LWR and HWR. MPUSEL=BHE=A<0>="H":set)
Table-4
MPU
SEL
MCS BHE
A<0> HWR LWR
HL HH L L
H
HL
H
H XX
Upper byte
Write
Write
Invalid
Invalid
Lower byte
Write
Invalid
Write
Invalid
Valid data bus
width of MPU
16-bit
Upper 8-bit
Lower 8-bit
(3) Reading from VRAM
(3-1) When use 8-bit MPU (MPUSEL="L",BHE="H":set)
Table-5
MPU
SEL
MCS BHE
A<0>
LL H L
H
X
H
RD
L
H
X
Odd address
Invalid
Read
Invalid
Even address
Read
Invalid
Invalid
Valid data bus
width of MPU
8-bit
(3-2) When use 16-bit MPU (MPUSEL="H":set)
Table-6
MPU
SEL
MCS BHE
A<0>
HL XX
H
RD
L
H
X
Upper byte
Read
Invalid
Lower byte
Read
Invalid
Valid data bus
width of MPU
16-bit
Note:Avoid setting combination except above,as cause of error action
:X="L" or "H"
5 Page 
MITSUBISHI <DIGITAL ASSP>
M66271FP
OPERATION PANEL CONTROLLER
(2-6) Display start address register [R6,R7]
Address R/W
Function
01010
SAL
SAH
SAL
D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0
00000000000000
00000000000001
00000000000010
Display start
address
0000H
0001H
0002H
R/W
01100
SAH
1 0 0 1 0 1 0 1 1 1 1 1 1 1 257FH
• D6 and D7 output "0" when read SAH.
• It is possible to set display start address to the extent of 257FH (=9600 address).
• Don't set over 2580H.
• When reset,SAL and SAH= "0000H".
• Display start address is established by the writing data to SAH register. Even if only change SAL,
surely set SAH after SAL.
• When select 8-bit MPU,start address set in SAL <D7 – D0> + SAH <D5 – D0>.
When select16-bit MPU,start address set in SAL <D7 – D1> + SAH <D5 – D0>.
• Even if selecting 16-bit MPU,enable to set display start address in character unit.
In case the display reading data from VRAM start at D<15:12>,set SAL <D0>="0",
and if start at D<7:4>,set SAL <D0>="1". (Refer to Figure-8)
Reset
0000H
(2-7) M cycle variable register [R8]
Address R/W
Function
01110 W
MT
D7 D6 D5 D4 D3 D2 D1 D0
00000000
00000001
00000010
Cycle of M
Toggle change at every 1 frame.
Toggle change at every 1 line(1LP).
Toggle change at every 2 lines.
1 1 1 1 1 1 1 1 Toggle change at every 255 lines.
• Set the cycle of M. In case of MT=01H,M repeat reversal(toggle) at every 1 line (at every 1 count of LP).
• When reset,MT="00H",toggle M signal at every 1 frame.
• We recommend this register set suitable value for user's LCD.
Reset
00H
(2-8) Data port register [R9]
Address R/W
10000 R/W
Function
DP
Data port (8bit)
D7 D6 D5 D4 D3 D2 D1 D0
• Exclusive data port register for the LCD module built-in system.
Reading or writing 8bit data between MPU and VRAM through this register.
• VRAM address index register (IDXL,IDXH) is increased of +1,when finished access to DP.
• Output indefinite data when reset.
Reset
XXH
(indefinite)
11 Page | ||
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