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PDF M62382FP Data sheet ( Hoja de datos )
| Número de pieza | M62382FP | |
| Descripción | 5V TYPE 12-BIT 4CH COMPOSITE MULTIPLYING D-A CONVERTER | |
| Fabricantes | Mitsubishi | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de M62382FP (archivo pdf) en la parte inferior de esta página. Total 8 Páginas | ||
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MITSUBISHI SEMICONDUCOR<STANDARD LINEAR>
M62382FP
5V TYPE 12-BIT 4CH COMPOSITE MULTIPLYING D-A CONVERTER
DESCRIPTION
M62382FP is a semiconductor integrated circuit of 5V CMOS
structure with 12-bit 4 channels of built-in multiplying D-A converters
and 8-bit 8 channels of built-in multiplying D-A converters.8-bit D-A
converters,when used in combination with 12-bit D-A converters,can
operate in a wider range.Parallel data input under the 2 modes(A,B)
of channel assignment allows for easier usage.
PIN CONFIGURATION(TOP VIEW)
75 74
52 51
76
77
50
49
FEATURES
•Built-in low power 12-bit 4 channels D-A converters
•8-bit D-A converter with buffer making full swing between Vcc and
GND.
•2 modes(A,B)of channel assignment
•Zero level function
Built-in function of retaining arbitrary assingned data in 12-bit D-A
converter.In normal use,output voltage can be switched to the voltage
corresponding to the formerly assigned data by the setting of
Z01,making it possible to caribrate the data(output voltage value).
99
100
27
26
12
24 25
OUTLINE 100P6Q
APPLICATION
•High precision measurement equipments such as memory testers,industrial measurement equipments,medical
equipments,standard equipments ingeneral
BLOCK DIAGRAM
Z00
Z01
0-level 12bit
D/A register
12 12
12
12
D11
D10
D09
D08
D07
D06
D05
D04
D03
D02
D01
D00
DA-Selector
for
12bit
D/A
12bit D/A C
24 812bit Register
8bit Register
LD
A04
A03 for 8bit D/A C
A01
A00
offset
8bit
D/A
for offset
A08
A07
8
A06 8bit Register
A05
A02 for
gain
8bit
D/A
8bit D/A C
for gain
333
24
VrefU(12DA)1
DAout(12DA)1
VrefL(12DA)1
VrefU(8DA1)1
0dB DAout(8DA1)1
VrefL(8DA1)1
VrefU(8DA2)1
0dB DAout(8DA2)1
VrefL(8DA2)1
CH1 D/A C
24
VDD
VSS
VDD
VSS
VCC
GND
VCC
GND
24
28
28
28
CH2 D/A C
CH3 D/A C
CH4 D/A C
VrefU(12DA)2
DAout(12DA)2
VrefL(12DA)2
VrefU(8DA1)2
DAout(8DA1)2
VrefL(8DA1)2
VrefU(8DA2)2
DAout(8DA2)2
VrefL(8DA2)2
VrefU(12DA)3
DAout(12DA)3
VrefL(12DA)3
VrefU(8DA1)3
DAout(8DA1)3
VrefL(8DA1)3
VrefU(8DA2)3
DAout(8DA2)3
VrefL(8DA2)3
VrefU(12DA)4
DAout(12DA)4
VrefL(12DA)4
VrefU(8DA1)4
DAout(8DA1)4
VrefL(8DA1)4
VrefU(8DA2)4
DAout(8DA2)4
VrefL(8DA2)4
( 1 / 8)
19981119
1 page  
NEW
MITSUBISHI SEMICONDUCOR<STANDARD LINEAR>
M62382FP
5V TYPE 12-BIT 4CH COMPOSITE MULTIPLYING D-A CONVERTER
RECOMMENDED OPERATING CONDITION(Ta=25˚C to 75˚C)
Symbol
Parameter
Condition
Min.
VCC
Analog power suppply voltage
4.5
VDD
Digital power supply voltage
4.5
VrefH H side D-A reference voltage
VCC-0.5
VrefL
VIH
L side D-A reference voltage
H level digital input voltage
GND
2
VIL
tDDCH
tADCH
tDCHD
tACHD
tLDH
L level digital input voltage
D-A data set up time
Address data set up time
D-A data hold time
Address data hold time
Load signal H level hold time
Driving 12bit and 8bit D-A converters at same time
Driving 12bit and 8bit D-A converters at same time
Driving 12bit and 8bit D-A converters at same time
Driving 12bit and 8bit D-A converters at same time
Driving 12bit and 8bit D-A converters at same time
GND
10
150
tLDH+35
tLDH+10
100
tZSH
Z00 signal H level hold time
TIMING CHART
15
tDDCH tDCHD
Limits
Typ.
5.0
5.0
Max.
5.5
5.5
VCC
0.5
VDD
0.8
D-A data(12 bit:D00 to D11)
D0
D1 D2
D-A data
(D0)
D1
tADCH tACHD
D2
Address data(9 bit:A00 to A08) A0
A1 A2
Address data(A0)
tLDH
A1
A2
Load signal(LD)
tSTDA
Unit
V
V
V
V
V
V
ns
ns
ns
ns
ns
ns
DAout(12DA)n
(CHn 12bit DAout)
DAout(Old data)
DAout(D0 dtat)
tstDA
DAout
(D2)
DAout(8DA)m
(CHm 8bit DAout)
Zero level setting (input/output) : Z00, Z01
DAout(Old data)
tDDCH tDCHD
DAout(D1 data)
Data for D/A converter
(D00-D11: 12bit data)
Zero level setting signal(Z00)
*Data sampling when signal rises,
data retained when signal falls.
Zero level output value is set by 12 bit data.
Data for zero level setting
tZSH
Set data to be memorized
Zero level load sigal (Z01)
*D/A output zero level at signal rise,
D/A output recovered at signal fall.
12bit DAC output
DAout(12DA)
(12bit DAout)
Zero level output and normal mode output can be switched with each other.
Back to original output value after
recovery
DAout (normal output)
tSTDA
DAout (zero level
output)
tSTDA
DAout (normal
output)
( 5 / 8)
19981119
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet M62382FP.PDF ] | |
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